LC8901Q Sanyo, LC8901Q Datasheet - Page 12

• Manufacturer Part Number: LC8901Q
• Description: Digital Audio Interface Receiver
• Manufacturer: Sanyo

PLL
1. The VCO is formed from a ring oscillator.
2. PLL operation starts when correct data is input to the data demodulation system and the XMODE pin goes high.
3. The low-pass filter time constant can be automatically switched according to the PLL lock state by setting the LPF
4. To prevent PLL locking failures, if a PLL locking operation is started and the PLL does not lock within a fixed
5. PLL operation is forcibly stopped by setting the STOP pin high. Normal operation will start again if the pin is set
XMODE Pin
The XMODE pin resets the system. Normal system operation is started by setting this pin high after the power supply
voltage has risen to at least 4.5 V. If the XMODE pin is set low, the VCO free-running clock is output from the FS384
pin and the internal circuits are reset.
Power-on Sequence Diagram
1. No input pins should be accessed until the XMODE pin has gone high and the system has started to operate.
2. The microprocessor interface pins must not be accessed until the XMODE pin has gone high and the system has
3. The data output pins must not be accessed until the ERROR pin has gone low after the XMODE pin has gone high.
pin high.
period, reinitialize the PLL system, and start the PLL locking operation again.
low.
started to operate.
LC8901, 8901Q
No. 4079-12/15