K9F1208Q0B Samsung semiconductor, K9F1208Q0B Datasheet
K9F1208Q0B
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K9F1208Q0B Summary of contents
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ELECTRONICS March. 2003 512Mb/256Mb 1.8V NAND Flash Errata Description : Some of AC characteristics are not meeting the specification > AC characteristics : Refer to Table Affected Products : K9F1208Q0A-XXB0, K9F1216Q0A-XXB0 K9F5608Q0C-XXB0, K9F5616Q0C-XXB0 K9K1208Q0C-XXB0, K9K1216Q0C-XXB0 Improvement schedule : The components ...
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... Note : For more detailed features and specifications including FAQ, please refer to Samsung’ s Flash web site. http://www.intl.samsungsemi.com/Memory/Flash/datasheets.html The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have any questions, please contact the SAMSUNG branch office near you ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 64M x 8 Bit / 32M x 16 Bit NAND Flash Memory PRODUCT LIST Part Number K9F1208Q0A-D,H K9F1216Q0A-D,H K9F1208U0A-Y,P K9F1208U0A-D,H K9F1208U0A-V,F K9F1216U0A-Y,P K9F1216U0A-D,P FEATURES Voltage Supply - 1.8V device(K9F12XXQ0A) : 1.70~1.95V - 3.3V device(K9F12XXU0A) : 2.7 ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 PIN CONFIGURATION (TSOP1) X16 X8 N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C R/B R N.C N.C N.C N.C Vcc Vcc Vss Vss N.C N.C N.C N.C CLE ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 PIN CONFIGURATION (TBGA N.C N.C N.C A /WP ALE Vss / /RE CLE ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 63-Ball TBGA (measured in millimeters) Top View 8.50 0.10 #A1 0.10MAX K9F1216Q0A-DCB0,DIB0,HCB0,HIB0 K9F1216U0A-YCB0,YIB0,PCB0,PIB0 K9F1216U0A-DCB0,DIB0,HCB0,HIB0 6 (Datum (Datum 63- 0.45 0.05 0. Side View ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 PIN CONFIGURATION (WSOP1) N.C N.C DNU N.C N.C N.C R DNU N.C Vcc Vss N.C DNU CLE ALE WE WP N.C N.C DNU N.C N.C PACKAGE DIMENSIONS 48-PIN LEAD/LEAD FREE PLASTIC VERY VERY THIN ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 PIN DESCRIPTION Pin Name DATA INPUTS/OUTPUTS I/O ~ I/O The I/O pins are used to input command, address and data, and to output data during read operations. The 0 7 (K9F1208X0A) I/O pins float to high-z ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Figure 1-1. K9F1208X0A (X8) FUNCTIONAL BLOCK DIAGRAM X-Buffers Latches & Decoders Y-Buffers Latches & Decoders Command Command CE Control Logic RE & ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Figure 1-2. K9F1216X0A (X16) FUNCTIONAL BLOCK DIAGRAM X-Buffers Latches & Decoders Y-Buffers Latches & Decoders Command Command CE Control Logic RE & ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Product Introduction The K9F1208X0A is a 528Mbit(553,648,218 bit) memory organized as 131,072 rows(pages) by 528 columns. Spare sixteen columns are located from column address of 512 to 527. A 528-byte data register is connected to memory ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Memory Map The device is arranged in four 128Mbit memory planes. Each plane contains 1,024 blocks and 528 byte(X8 device) or 264 word(X16 device) page registers. This allows it to perform simultaneous page program and block ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative K9F12XXX0A-XCB0 Temperature Under Bias K9F12XXX0A-XIB0 K9F12XXX0A-XCB0 Storage Temperature K9F12XXX0A-XIB0 Short Circuit Current NOTE : 1. Minimum DC voltage is -0.6V on input/output pins. During ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 VALID BLOCK Parameter Valid Block Number NOTE : K9F12XXX0A 1. The may include invalid blocks when first shipped. Additional invalid blocks may develop while being used. The number of valid blocks is presented with both cases ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 AC Timing Characteristics for Command / Address / Data Input Parameter CLE Set-up Time CLE Hold Time CE Setup Time CE Hold Time WE Pulse Width ALE Setup Time ALE Hold Time Data Setup Time Data ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 NAND Flash Technical Notes Invalid Block(s) Invalid blocks are defined as blocks that contain one or more invalid bits whose reliability is not guaranteed by Samsung. The infor- mation regarding the invalid block( called ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 NAND Flash Technical Notes (Continued) Error in write or read operation Within its life time, the additional invalid blocks may develop with NAND Flash memory. Refer to the qualification report for the actual data.The following possible ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 NAND Flash Technical Notes (Continued) Erase Flow Chart Start Write 60h Write Block Address Write D0h Read Status Register I R Erase Error I ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Pointer Operation of K9F1208X0A(X8) Samsung NAND Flash has three address pointer commands as a substitute for the two most significant column addresses. ’ 00h’ command sets the pointer to ’ A’ area(0~255byte), ’ 01h’ command sets ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Pointer Operation of K9F1216X0A(X16) Samsung NAND Flash has two address pointer commands as a substitute for the most significant column address. ’ 00h’ command sets the pointer to ’ A’ area(0~255word), and ’ 50h’ command sets ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 System Interface Using CE don’ t-care. For an easier system interface, CE may be inactive during the data-loading or sequential data-reading as shown below. The internal 528byte 1264word page registers are utilized as separate buffers for ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Device K9F1208X0A(X8 device) K9F1216X0A(X16 device) NOTE: 1. I/O8~15 must be set to "0" during command or address input. 2. I/O8~15 are used only for data bus. * Command Latch Cycle CLE CE WE ALE I/O X ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 * Input Data Latch Cycle CLE CE t ALS ALE I/Ox * Serial access Cycle after Read R/B NOTES : Transition is measured 200mV from steady state voltage ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 * Status Read Cycle CLE I/O X READ1 OPERATION (READ ONE PAGE) CLE ALE RE N Address 00h or 01h I ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Read1 Operation (Intercepted by CE) CLE CE WE ALE I/O 00h or 01h Column Address R/B Read2 Operation (Read One Page) CLE CE WE ALE ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Sequential Row Read Operation ( Within a Block ) CLE CE WE ALE RE 00h I R/B M Page Program Operation CLE ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 BLOCK ERASE OPERATION CLE ALE RE I/O 60h Page(Row) Address R/B Auto Block Erase Setup Command K9F1216Q0A-DCB0,DIB0,HCB0,HIB0 K9F1216U0A-YCB0,YIB0,PCB0,PIB0 K9F1216U0A-DCB0,DIB0,HCB0,HIB0 (ERASE ONE BLOCK ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 K9F1216Q0A-DCB0,DIB0,HCB0,HIB0 K9F1216U0A-YCB0,YIB0,PCB0,PIB0 K9F1216U0A-DCB0,DIB0,HCB0,HIB0 27 FLASH MEMORY ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Multi-Plane Block Erase Operation CLE ALE RE I/O 60h Page(Row) Address R/B Block Erase Setup Command Max. 4 times repeatable * For Multi-Plane Erase ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Read ID Operation CLE CE WE ALE RE I/O 90h X Read ID Command ID Defintition Table Access command = 90H Value 1 st Byte ECh 2 nd Byte 76h 3 rd Byte ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Copy-Back Program Operation CLE ALE RE 00h I Column Page(Row) Address Address R/B K9F1216Q0A-DCB0,DIB0,HCB0,HIB0 K9F1216U0A-YCB0,YIB0,PCB0,PIB0 K9F1216U0A-DCB0,DIB0,HCB0,HIB0 On K9F1208U0A-Y,P or K9F1208U0A-V,F ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Device Operation PAGE READ Upon initial device power up, the device defaults to Read1 mode. This operation is also initiated by writing 00h to the command regis- ter along with four address cycles. Once the command ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Figure 7. Read1 Operation CLE CE WE ALE R/B RE 00h Start Add.(4Cycle) I device : X16 device : NOTE: 1) After data access ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Figure 8. Read2 Operation CLE CE WE ALE R/B RE 50h Start Add.(4Cycle) I device : X16 device : device : Don’ ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Figure 10. Sequential Row Read2 Operation (only for K9F1208U0A-Y,P and K9F1208U0A-V,F valid within a block ) R/B I/O Start Add.(4Cycle) X 50h & ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 BLOCK ERASE The Erase operation is done on a block(16K Byte) basis. Block address loading is accomplished in three cycles initiated by an Erase Setup command(60h). Only address A block address loading initiates the internal erasing ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Restriction in addressing with Multi Plane Page Program While any block in each plane may be addressable for Multi-Plane Page Program, the five least significant addresses(A9-A13) for the selected pages at one operation must be the ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Copy-Back Program The copy-back program is configured to quickly and efficiently rewrite data stored in one page within the plane to another page within the same plane without utilizing an external memory. Since the time-consuming sequently-reading ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Multi-Plane Copy-Back Program Multi-Plane Copy-Back Program is an extension of one page Copy-Back Program into four plane operation. Since the device is equipped with four memory planes, activating the four sets of 528 bytes(x8 device) or ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 K9F1216Q0A-DCB0,DIB0,HCB0,HIB0 K9F1216U0A-YCB0,YIB0,PCB0,PIB0 K9F1216U0A-DCB0,DIB0,HCB0,HIB0 39 FLASH MEMORY ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 READ STATUS The device contains a Status Register which may be read to find out whether program or erase operation is completed, and whether the program or erase operation is completed successfully. After writing 70h command ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Read ID The device contains a product identification mode, initiated by writing 90h to the command register, followed by an address input of 00h. Four read cycles sequentially output the manufacture code(ECh), and the device code ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 RESET The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state during random read, program or erase mode, the reset operation will abort these operations. ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 READY/BUSY The device has a R/B output that provides a hardware method of indicating the completion of a page program, erase and random read completion. The R/B pin is normally high but transitions to low after ...
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K9F1208U0A-VCB0,VIB0,FCB0,FIB0 K9F1208Q0A-DCB0,DIB0,HCB0,HIB0 K9F1208U0A-YCB0,YIB0,PCB0,PIB0 K9F1208U0A-DCB0,DIB0,HCB0,HIB0 Data Protection & Power-up sequence The device is designed to offer protection from any involuntary program/erase during power-transitions. An internal voltage detector disables all functions whenever Vcc is below about 1.1V(1.8V device) or 2V(3.3V device). WP ...