AM79C973KCW Advanced Micro Devices, AM79C973KCW Datasheet - Page 195
AM79C973KCW
Manufacturer Part Number
AM79C973KCW
Description
PCnet-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C973KCW.pdf
(304 pages)
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ANR1: Status Register (Register 1)
The Status Register identifies the physical and Auto-
negotiation capabilities of the local PHY. This register is
read only; a write will have no effect.
Note:
1. LH = Latching High, LL = Latching Low.
2. The link status bit 2 is fed from register 24 bit 3. Register 24 bit 3 tracks the real time state of the PHY, but link status in ANR1
1
1
Reg
(Note
(Note
1)
1)
1
1
1
1
1
1
1
1
1
1
1
is latched. After a change of the state of the link, ANR1 must be read twice. The first read will provide old information but it
causes the link status bit to be updated from register 24 bit 3. The second read will then provide the correct state of the link.
10-7
Bits
15
14
13
12
11
6
5
4
3
2
1
0
100BASE-T4
100BASE-X Full Duplex
100BASE-X Half Duplex
10 Mbps Full Duplex
10 Mbps Half Duplex
Reserved
MF Preamble Suppression
Auto-Negotiation Complete
Remote Fault
Auto-Negotiation Ability
Link Status
Jabber Detect
Extended Capability
Name
Table 41. ANR1: PHY Status Register (Register 1)
P R E L I M I N A R Y
Am79C973/Am79C975
1 = 100BASE-T4 able,
0 = not 100BASE-T4 able
1 = 100BASE-X full duplex able,
0 = not 100BASE-X full duplex able
1 = 100BASE-X half duplex able,
0 = not 100BASE-X half duplex able
1 = 10 Mbps full duplex able,
0 = not 10 Mbps full duplex able
1 = 10 Mbps full duplex able,
0 = not 10 Mbps full duplex able
Ignore when read
1 = PHY can accept management
(mgmt) frames with or without preamble,
0 = PHY can only accept mgmt frames
with preamble
1 = Auto-Negotiation completed,
0 = Auto-Negotiation not completed
1 = remote fault detected,
0 = no remote fault detected
1 = PHY able to auto-negotiate,
0 = PHY not able to auto-negotiate
1 = link is up,
0 = link is down
1 = jabber condition detected,
0 = no jabber condition detected
1 = extended register capabilities,
0 = basic register set capabilities only
Description
Read/Write
(Note 1)
RO, LH
RO, LL
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Default
Value
0
1
1
1
1
0
1
0
0
1
0
0
1
195
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