AM79C973KCW Advanced Micro Devices, AM79C973KCW Datasheet - Page 172

• Manufacturer Part Number: AM79C973KCW
• Description: PCnet-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
• Manufacturer: Advanced Micro Devices

BCR16: I/O Base Address Lower
Bit
31-16 RES
15-5
4-0
BCR17: I/O Base Address Upper
Bit
31-16 RES
15-0
172
IOBASEL
RES
IOBASEU
Name
Name
will always operate in the half-du-
plex mode. When FDEN is set,
the Am79C973/Am79C975 con-
troller will operate in full-duplex
mode. Do not set this bit when
Auto-Negotiation is enabled.
Reserved locations. Written as
zeros and read as undefined.
Reserved
H_RESET, the value of these bits
will be undefined. The settings of
these bits will have no effect on
any Am79C973/Am79C975 con-
troller function. It is only included
for software compatibility with
other PCnet family devices.
Reserved locations. Written as
zeros, read as undefined.
Reserved locations. Written as
zeros and read as undefined.
Reserved
H_RESET, the value in this regis-
ter will be undefined. The settings
of this register will have no effect
on any Am79C973/Am79C975
controller function. It is only in-
cluded for software compatibility
with other PCnet family devices.
Read/Write accessible always.
FDEN is reset to 0 by H_RESET,
and is unaffected by S_RESET
and the STOP bit.
Read/Write accessible always.
IOBASEL is not affected by
S_RESET or STOP.
Read/Write accessible always.
IOBASEU is not affected by
S_RESET or STOP.
Description
Description
locations.
locations.
P R E L I M I N A R Y
Am79C973/Am79C975
After
After
BCR18: Burst and Bus Control Register
Note: Bits 15-0 in this register are programmable
through the EEPROM.
Bit
31-16 RES
15-12 ROMTMG
ROMTMG (bits 15-12)
1h<=n <=Fh
Table 31. ROMTNG Programming Values
Name
Expansion ROM Timing. The val-
Reserved locations. Written as
zeros and read as undefined.
ue of ROMTMG is used to tune
the
(BCR30) accesses to Flash/
EPROM as well as all Expansion
ROM accesses to Flash/EPROM.
ROMTMG, during read opera-
tions, defines the time from when
the Am79C973/Am79C975 con-
troller drives the lower 8 or 16 bits
of the Expansion Bus Address
bus to when the Am79C973/
Am79C975 controller latches in
the data on the 8 or 16 bits of the
Expansion
ROMTMG, during write opera-
tions, defines the time from when
the Am79C973/Am79C975 con-
troller drives the lower 8 or 16 bits
of the Expansion Bus Data to
when the EBWE and EROMCS
deassert.
The register value specifies the
time in number of clock cycles +1
according to Table 31.
Note: Programming ROMTNG
with a value of 0 is not permitted.
The access time for the Expan-
sion
(BCR30) device (t
read operations can be calculat-
ed by subtracting the clock to out-
put delay for the EBUA_EBA[7:0]
outputs (t
ing the input to clock setup time
for the EBD[7:0] inputs (t
from the time defined by ROMT-
MG:
t
*CLK_FAC - (t
Description
ACC
No. of Expansion Bus Cycles
timing
= ROMTMG * CLK period
ROM or
v_A_D
Bus
for
v_A_D
n+1
) and by subtract-
the
all
Data
ACC
) - (t
EBDATA
EBDATA
) during
s_D
inputs.
)
s_D
)