AM79C32A Advanced Micro Devices, AM79C32A Datasheet - Page 14

• Manufacturer Part Number: AM79C32A
• Description: Digital Subscriber Controller (DSC) Circuit
• Manufacturer: Advanced Micro Devices

14
Operation
Block
MUX
MUX
MUX
MUX
MUX
MAP
MAP
MAP
MAP
MAP
MAP
MAP
MAP
MAP
MAP
MAP
MAP
MAP
MAP
MAP
MAP
MAP
DLC
DLC
DLC
DLC
DLC
INIT
INIT
LIU
LIU
LIU
LIU
LIU
LIU
LIU
LIU
Register
Initialization Register
Initialization Register 2
LIU Status Register
LIU Priority Register
LIU Mode Register 1
LIU Mode Register 2
—
Multiframe Register
Multiframe S-bit/Status Register
Multiframe Q-bit buffer
MUX Control Register 1
MUX Control Register 2
MUX Control Register 3
MUX Control Register 4
—
X filter Coefficient Register
R filter Coefficient Register
GX Gain Coefficient Register
GR Gain Coefficient Register
GER Gain Coefficient Register
Sidetone Gain Coefficient Register
Frequency Tone Generator Register
1, 2
Amplitude Tone Generator Register
1, 2
MAP Mode Register 1
MAP Mode Register 2
—
MAP Mode Register 3
Secondary Tone Ringer Amplitude
Secondary Tone Ringer Frequency
Transmit Peak Register
Receive Peak Register
—
First Received Byte Address
Registers 1, 2, 3
Second Received Byte Address
Registers 1, 2, 3
Transmit Address Register
D-channel Receive Byte Limit
Register
D-channel Transmit Byte Count
Register
Table 7. Indirect Register Access Guide
Am79C30A/32A Data Sheet
Register
Number
10
11
12
13
14
15
16
17
1
2
1
2
3
4
5
6
7
8
1
2
3
4
5
1
2
3
4
5
6
7
8
9
1
2
3
4
5
FTGR1, FTGR2
ATGR1,ATGR2
Indirect Name
Perform 15–16
Perform 1–10
FRAR 1, 2, 3
SRAR1, 2, 3
Perform 2–4
Perform 1–4
GER Coeff.
STG Coeff.
GR Coeff.
GX Coeff.
R Coeff.
X Coeff.
PEAKX
PEAKR
MMR1
MMR2
MMR3
MFSB
MFQB
MCR1
MCR2
MCR3
MCR4
DTCR
LMR1
LMR2
STRA
DRLR
STRF
INIT2
LSR
LPR
INIT
TAR
MF
Mode Address
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
W
R
R
R
R
R
–
A1H
A2H
A4H
A5H
A6H
A7H
A8H
6AH
6BH
6CH
6DH
6EH
21H
20H
41H
42H
43H
44H
45H
61H
62H
63H
64H
65H
66H
67H
68H
69H
70H
71H
72H
81H
82H
83H
84H
85H
A3H
One byte transferred
One byte transferred
One byte transferred
One byte transferred
One byte transferred
One byte transferred
One byte transferred
One byte transferred
One byte transferred
One byte transferred
One byte transferred
One byte transferred
One byte transferred
MCR1, 2, 3, 4
h0 LSB, h0 MSB...h7 MSB
h0 LSB, h0 MSB...h7 MSB
LSB, MSB
LSB, MSB
LSB, MSB
LSB, MSB
FTGR1, 2
ATGR1, 2
One byte transferred
One byte transferred
46 bytes loaded 1–10
One byte transferred
One byte transferred
One byte transferred
One byte transferred
One byte transferred
One byte transferred
FRAR1, 2
SRAR1, 2
LSB, MSB
LSB, MSB
LSB, MSB
One byte transferred
Byte Sequence