AK4640VG Asahi Kasei Microsystems, AK4640VG Datasheet - Page 70
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AK4640VG
Manufacturer Part Number
AK4640VG
Description
16BIT CODEC WITH MIC /HP/SPK-AMPl
Manufacturer
Asahi Kasei Microsystems
Datasheet
1.AK4640VG.pdf
(76 pages)
- Current page: 70 of 76
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ASAHI KASEI
MS0273-E-00
(Addr:0CH 0DH, D7-0)
ATTL7-0 bits
Speaker-amp Output
(Addr:05H, D7-5)
<Example>
(Addr:01H, D0)
(Addr:01H, D3)
(Addr:05H, D0)
PMDAC bit
FS2-0 bits
(Addr:09H, D6
PMSPK bit
ALC2 bit
SPPS bit
SPP pin
SPN pin
At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up a sampling frequency (FS2-0 bits) if PLL mode is used.
(2) Set up the ALC2 Enable/Disable(ALC2 bit)
(3) Set up the digital volume(Addr : 0CH and 0DH)
(4) Power up of DAC and Speaker-amp : PMDAC bit = PMSPK bit = “0” → “1”
(5) Exit the power-save-mode of Speaker-amp : SPPS bit = “0” → “1”
(6) Enter the power-save-mode of Speaker-amp : SPPS bit = “1” → “0”
(7) Power down DAC and Speaker-amp : PMDAC bit = PMSPK bit = “1” → “0”
SPPS bit should be set to “1” at more than 1ms after PMSPK bit is set to “1”.
The initializing time of Speaker-amp is 2048/fs=46.4ms@fs=44.1kHz.
At DATTC bit = “1”(default), ATTL7-0 bits of Address 0CH control both Lch and Rch attenuation level.
000
0000000
0
(1)
Hi-Z
(2)
Hi-Z
(3)
(4)
HVDD/2
Figure 52. Speaker-Amp Output Sequence
(5)
Normal Output
Normal Output
XXX
XXXXXXX
X
- 70 -
(6)
HVDD/2
Hi-Z
(7)
Hi-Z
E x a m p le :
X ’ta l a n d P L L a r e u s e d .
S a m p li n g F r e q u e n c y : 4 8 k H z
D A T T C b it = “ 1 ”( d e f a u lt )
D ig it a l A t te n u a to r L e v e l : 0 d B
A L C 1 : D is a b le
A L C 2 : D is a b le
( 1 ) A d d r :0 5 H , D a ta 6 0 H
( 2 ) A d d r :0 9 H , D a t a 0 0 H
( 3 ) A d d r :0 C H , D a ta 0 0 H
( 4 ) A d d r :0 1 H , D a t a 6 9 H
( 5 ) A d d r :0 5 H , D a t a 6 1 H
( 6 ) A d d r :0 5 H , D a t a 6 0 H
( 7 ) A d d r :0 1 H , D a t a 6 0 H
P la y b a c k
[AK4640]
2004/03
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