AK4640VG Asahi Kasei Microsystems, AK4640VG Datasheet - Page 65

• Manufacturer Part Number: AK4640VG
• Description: 16BIT CODEC WITH MIC /HP/SPK-AMPl
• Manufacturer: Asahi Kasei Microsystems

ASAHI KASEI
MS0273-E-00
(Addr:04H, D5-4)
BICK, LRCK
2. When X'tal is used in PLL mode. (Master mode)
<Example>
(Addr:01H, D7)
(Addr:01H, D6)
(Addr:01H, D5)
(Addr:04H, D3)
(Master Mode)
MCKPD bit
PS1-0 bits
PMXTL bit
PMPLL bit
MCKO pin
MCKO bit
(1) Release the pull-down of the XTI pin : MCKPD bit = “1” → “0” and and power-up the X’tal oscillator: PMXTL
(2) Power-up PLL : PMPLL bit = “0” → “1”
(3) Enable MCKO output : MCKO bit = “0” → “1” and set up MCKO output frequency (PS1-0 bits)
(4) MCKO, BICK and LRCK are output after PLL lock time.
bit = “0” → “1”
The PLL should be powered-up after the X’tal oscillator becomes stable. If X'tal and PLL are powered-up at
the same time, the PLL does not start. It takes X’tal oscillator 20ms(typ) to be stable after PMXTL bit= “1”.
This time depends on X’tal. PLL needs 40ms lock time the PMPLL bit = “0” → “1”.
(1)
20ms(typ) (2)
00
(3)
40msec(max)
Figure 46. Clock Set Up Sequence(2)
(4)
XX
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Output
Output
E x a m p le :
(4 ) M C K O , B IC K a n d L R C K o u tp u t s ta rts
A u d io I/F F o r m a t : I
B IC K f re q u e nc y a t M a s te r M o d e : 6 4 f s
I np u t M a s t e r C lo c k S e le c t a t P L L M o d e : 1 1 .2 8 9 6 M H z
O utp u t M a s te r C lo c k F re q ue n c y : 6 4 f s
(1 ) A d d r:0 1 H , D a ta :4 0 H
(2 ) A d d r:0 1 H , D a ta :6 0 H
(3 ) A d d r:0 4 H , D a ta 6 A H
2
S
[AK4640]
2004/03