AK4640VG Asahi Kasei Microsystems, AK4640VG Datasheet - Page 27

• Manufacturer Part Number: AK4640VG
• Description: 16BIT CODEC WITH MIC /HP/SPK-AMPl
• Manufacturer: Asahi Kasei Microsystems

ASAHI KASEI
Upon power-up, reset the AK4640 by bringing the PDN pin = “L”. This ensures that all internal registers are reset to their
initial values.
The ADC enters an initialization cycle that starts when the PMADC bit is changed from “0” to “1”. The initialization
cycle time is 2081/fs, or 47.2ms@fs=44.1kHz. During the initialization cycle, the ADC digital data outputs of both
channels are forced to a 2's compliment, “0”. The ADC output reflects the analog input signal after the initialization cycle
is complete. The DAC does not require an initialization cycle.
Three types of data formats are available and are selected by setting the DIF1-0 bits (Table 13). In all modes, the serial
data is MSB first, 2’s complement format. The SDTO is clocked out on the falling edge of BICK and the SDTI is latched
on the rising edge. All data formats can be used in both master and slave modes. LRCK and BICK are output from
AK4640 in master mode, but must be input to AK4640 in slave mode. If 16bit data that ADC outputs is converted to 8bit
data by removing LSB 8bit, “−1” at 16bit data is converted to “−1” at 8bit data. And when the DAC playbacks this 8bit
data, “−1” at 8bit data will be converted to “−256” at 16bit data and this is a large offset. This offset can be removed by
adding the offset of “128” to 16bit data before converting to 8bit data.
MS0273-E-00
System Reset
Audio Interface Format
Mode
LRCK
BICK(32fs)
SDTO(o)
BICK(64fs)
SDTO(o)
SDTI(i)
SDTI(i)
0
1
2
3
DIF1
0
0
1
1
0
0 1
15 14
15 14
15 14 13
15:MSB, 0:LSB
1
DIF0
0
1
0
1
2 3
2 3
Don't Care
13
13
SDTO (ADC)
MSB justified
MSB justified
Lch Data
7
7 6 5 4 3 2 1 0
1
Table 13. Audio Interface Format
15
9
N/A
6 5 4 3
0
I
Figure 16. Mode 0 Timing
10
16
2
S
15 14
11 12 13 14 15 0 1 2 3
17 18
- 27 -
2
MSB justified
LSB justified
SDTI (DAC)
1 0
1 0
31 0 1 2 3
N/A
I
15 14 13
2
S
Don't Care
≥ 32fs
≥ 32fs
≥ 32fs
BICK
N/A
Rch Data
7 6 5 4 3 2 1 0
15
9
10
16 17 18
15
11 12 13 14 15
Figure 16
Figure 17
Figure 18
14
Figure
-
2 1 0
31
Default
0
0
15
15
15
1
1
[AK4640]
2004/03