M40SZ100 ST Microelectronics, M40SZ100 Datasheet - Page 5

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M40SZ100

Manufacturer Part Number
M40SZ100
Description
5V or 3V NVRAM SUPERVISOR FOR LPSRAM
Manufacturer
ST Microelectronics
Datasheet

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Figure 7. Hardware Hookup
Note: 1. User supplied for the 16-pin package
MAXIMUM RATING
Stressing the device above the rating listed in the
“Absolute Maximum Ratings” table may cause
permanent damage to the device. These are
stress ratings only and operation of the device at
these or any other conditions above those indicat-
ed in the Operating sections of this specification is
Table 2. Absolute Maximum Ratings
Note: 1. Reflow at peak temperature of 215°C to 225°C for < 60 seconds (total thermal budget not to exceed 180°C for between 90 to 120
Symbol
T
CAUTION: Negative undershoots below –0.3V are not allowed on any pin while in the Battery Back-up mode.
CAUTION: Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets.
T
SLD
V
V
P
STG
I
CC
seconds).
O
IO
D
(1)
Unregulated
Voltage
Storage Temperature (V
Lead Solder Temperature for 10 seconds
Input or Output Voltages
Supply Voltage
Output Current
Power Dissipation
R1
R2
V IN
From Microprocessor
Regulator
V CC
Parameter
CC
0.1 F
3.0V, 3.3V or 5V
Off)
V CC
E
RSTIN
PFI
V SS
V BAT
not implied. Exposure to Absolute Maximum Rat-
ing conditions for extended periods may affect de-
vice
STMicroelectronics SURE Program and other rel-
evant quality documents.
M40SZ100W
M40SZ100Y
M40SZ100W
M40SZ100Y
SNAPHAT
(1)
SOIC
E CON
V OUT
PFO
RST
reliability.
BL
–0.3 to V
To Microprocessor NMI
To Microprocessor Reset
To Battery Monitor Circuit
M40SZ100Y, M40SZ100W
–55 to 125
–0.3 to 4.6
–40 to 85
0.1 F
–0.3 to 7
Refer
Value
260
20
1
CC
V CC
+0.3
1Mb or 4Mb
E
LPSRAM
also
AI04767
to
Unit
mA
°C
°C
°C
W
V
V
V
5/19
the

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