X5083 Xicor, X5083 Datasheet - Page 15
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X5083
Manufacturer Part Number
X5083
Description
CPU Supervisor with 8Kbit SPI EEPROM
Manufacturer
Xicor
Datasheet
1.X5083.pdf
(21 pages)
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X5083
Power-Up and Power-Down Timing
RESET Output Timing
Note: (5) This parameter is periodically sampled and not 100% tested.
CS vs. RESET Timing
RESET Output Timing
REV 1.1.6 6/25/02
Symbol
V
Symbol
t
t
V
PURST
RPD
RVALID
t
t
t
t
t
WDO
TRIP
CST
RST
V
R
F
(6) PT= Package/Temperature
CC
(5)
(5)
(5)
RESET
0 Volts
V
Reset trip point voltage, X5083PT-4.5A (See note 6)
Reset trip point voltage, X5083PT
Reset trip point voltage, X5083PT-2.7A
Reset trip point voltage, X5083PT-2.7
Power-up reset time out
V
V
V
Reset valid V
Watchdog time out period,
CS pulse width to reset the watchdog
Reset time out
TRIP
CC
CC
CC
WD1 = 1, WD0 = 1(default)
WD1 = 1, WD0 = 0
WD1 = 0, WD0 = 1
WD1 = 0, WD0 = 0
detect to reset/output
fall time
rise time
t
R
RESET
t
PURST
CS
CC
t
PURST
Parameter
Parameter
V
TRIP
t
RPD
t
t
F
WDO
www.xicor.com
t
CST
t
RST
Min.
100
450
400
100
1
t
WDO
Min.
4.25
2.85
2.55
100
4.5
0.1
0.1
Characteristics subject to change without notice.
1
Typ.
OFF
200
600
200
t
1.4
RST
Typ.
4.63
4.38
2.93
2.63
200
Max.
300
800
300
2
Max.
4.75
3.00
280
500
4.5
2.7
Unit
sec
ms
ms
ms
ns
Unit
ms
15 of 21
ns
ns
ns
V
V