SAB-C165-RM Siemens Semiconductor Group, SAB-C165-RM Datasheet - Page 45
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SAB-C165-RM
Manufacturer Part Number
SAB-C165-RM
Description
C16x-Family of High-Performance CMOS 16-Bit Microcontrollers
Manufacturer
Siemens Semiconductor Group
Datasheet
1.SAB-C165-RM.pdf
(49 pages)
- Current page: 45 of 49
- Download datasheet (721Kb)
AC Characteristics (cont’d)
CLKOUT and READY
V
T
T
C
C
Parameter
CLKOUT cycle time
CLKOUT high time
CLKOUT low time
CLKOUT rise time
CLKOUT fall time
CLKOUT rising edge to
ALE falling edge
Synchronous READY
setup time to CLKOUT
Synchronous READY
hold time after CLKOUT
Asynchronous READY
low time
Asynchronous READY
setup time
Asynchronous READY
hold time
Async. READY hold time
after RD, WR high
(Demultiplexed Bus)
Notes
1)
2)
Semiconductor Group
A
A
CC
L
L
These timings are given for test purposes only, in order to assure recognition at a specific clock edge.
Demultiplexed bus is the worst case. For multiplexed bus 2TCL are to be added to the maximum values. This
adds even more time for deactivating READY.
The 2t
= 0 to +70 ˚C
= -40 to +85 ˚C
(for PORT0, PORT1, Port 4, ALE, RD, WR, BHE, CLKOUT) = 100 pF
(for Port 6, CS) = 100 pF
= 5 V
A
1)
refer to the next following bus cycle.
1)
10 %;
2)
V
for SAB-C165-LM, SAB-C165-RM, SAB-C165-LF, SAB-C165-RF
for SAF-C165-LM
SS
= 0 V
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
29
30
31
32
33
34
35
36
37
58
59
60
CC 50
CC 20
CC 15
CC –
CC –
CC 0 +
SR 10
SR 0
SR 65
SR 15
SR 0
SR 0
min.
Max. CPU Clock
t
A
= 20 MHz
44
max.
50
–
–
5
5
10 +
–
–
–
–
–
0
+ 2
2)
t
A
t
+
A
t
F
min.
2TCL
TCL – 5
TCL – 10
–
–
0 +
10
0
2TCL + 15
15
0
0
1/2TCL = 1 to 20 MHz
Variable CPU Clock
t
A
max.
2TCL
–
–
5
5
10 +
–
–
–
–
–
TCL - 25
+ 2
2)
t
A
t
+
A
t
F
C165
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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