MC912DG128A Motorola, MC912DG128A Datasheet - Page 292
MC912DG128A
Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC912DG128A.pdf
(404 pages)
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Identifier Registers
(IDRn)
MSCAN Controller
MC68HC912DT128A Rev 2.0
292
ADDR
1. x is 4, 5, 6, or 7 depending on which buffer RxFG, Tx0, Tx1, or Tx2 respectively.
$01x0
$01x1
$01x2
$01x3
(1)
REGISTER
IDR0
IDR1
IDR2
IDR3
The identifiers consist of either 11 bits (ID10–ID0) for the standard, or 29
bits (ID28–ID0) for the extended format. ID10/28 is the most significant
bit and is transmitted first on the bus during the arbitration procedure.
The priority of an identifier is defined to be highest for the smallest binary
number.
SRR — Substitute Remote Request
IDE — ID Extended
This fixed recessive bit is used only in extended format. It must be set
to 1 by the user for transmission buffers and will be stored as received
on the CAN bus for receive buffers.
This flag indicates whether the extended or standard identifier format
is applied in this buffer. In case of a receive buffer the flag is set as
being received and indicates to the CPU how to process the buffer
identifier registers. In case of a transmit buffer the flag indicates to the
msCAN12 what type of identifier to send.
R/W
Figure 53 Standard Identifier Mapping
W
W
W
W
R
R
R
R
0 = Standard format (11-bit)
1 = Extended format (29-bit)
BIT 7
ID10
ID2
MSCAN Controller
ID9
ID1
6
ID8
ID0
5
RTR
ID7
4
IDE(0)
ID6
3
ID5
2
ID4
1
MOTOROLA
24-mscan12
BIT 0
ID3
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