MC912DG128A Motorola, MC912DG128A Datasheet - Page 152
MC912DG128A
Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC912DG128A.pdf
(404 pages)
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Clock Functions
MC68HC912DT128A Rev 2.0
152
STOP exit without Limp Home
mode,
clock monitor disabled
Executing the STOP instruction
without Limp Home mode, clock
monitor enabled
STOP exit in Limp Home mode
with Delay
STOP exit in Limp Home mode
without Delay (Fast Stop
Recovery)
Pseudo-STOP exit in Limp Home
mode with Delay
Pseudo-STOP exit
in Limp Home mode without
Delay (Fast Stop Recovery)
Pseudo-STOP exit without Limp
Home mode, clock monitor
enabled
Pseudo-STOP exit without Limp
Home mode, clock monitor
disabled, with Delay
Pseudo-STOP exit without Limp
Home mode, clock monitor
disabled, without Delay
Mode
Mode
Table 24 Summary of Pseudo STOP Mode Exit Conditions
Table 23 Summary of STOP Mode Exit Conditions
. .
NOLHM=1
CME=0
DLY=X
NOLHM=1
CME=1
DLY=X
NOLHM=0
CME=X
DLY=1
NOLHM=0
CME=X
DLY=0
Conditions
NOLHM=0
CME=X
DLY=1
NOLHM=0
CME=X
DLY=0
NOLHM=1
CME=1
DLY=X
NOLHM=1
CME=0
DLY=1
NOLHM=1
CME=0
DLY=0
Conditions
Clock Functions
Oscillator must be stable within 4096 XCLK cycles. XCLK
can be modified by SLOW divider register.
Use of DLY=0 only recommended with external clock.
When a STOP instruction is executed the MCU resets via
the clock monitor reset vector.
Oscillator must be stable within 4096
f
the clock monitor circuit can be misled by EXTALi clock into
reporting a good signal before it has fully stabilised
This mode is only recommended for use with an external
clock source.
CPU exits stop in limp home mode and oscillator running. If
the oscillator fails during pseudo-STOP and then recovers
there is a possibility of code runaway as the clock monitor
circuit can be misled by EXTALi clock into reporting a good
signal before it has fully stabilised
This mode is not recommended as it is possible that the
initial VCO clock frequency may be high enough to cause
code runaway.
When a STOP instruction is executed the MCU resets via
the clock monitor reset vector.
Oscillator starts operation following 4096 XCLK cycles
(actual controlled by SLOW mode divider).
This mode is only recommended for use with an external
clock source.
VCOMIN
cycles or there is a possibility of code runaway as
Summary
Summary
MOTOROLA
18-clock
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