MC912DG128A Motorola, MC912DG128A Datasheet - Page 252
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MC912DG128A
Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC912DG128A.pdf
(404 pages)
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STOP Signal
Repeated START
Signal
Arbitration
Procedure
Inter-IC Bus
MC68HC912DT128A Rev 2.0
252
bit, which is signalled from the receiving device by pulling the SDA low
at the ninth clock. So one complete data byte transfer needs nine clock
pulses.
If the slave receiver does not acknowledge the master, the SDA line
must be left high by the slave. The master can then generate a stop
signal to abort the data transfer or a start signal (repeated start) to
commence a new calling.
If the master receiver does not acknowledge the slave transmitter after
a byte transmission, it means ’end of data’ to the slave, so the slave
releases the SDA line for the master to generate STOP or START signal.
The master can terminate the communication by generating a STOP
signal to free the bus. However, the master may generate a START
signal followed by a calling command without generating a STOP signal
first. This is called repeated START. A STOP signal is defined as a
low-to-high transition of SDA while SCL at logical “1” (see
The master can generate a STOP even if the slave has generated an
acknowledge at which point the slave must release the bus.
As shown in
generated without first generating a STOP signal to terminate the
communication. This is used by the master to communicate with another
slave or with the same slave in different mode (transmit/receive mode)
without releasing the bus.
IIC is a true multi-master bus that allows more than one master to be
connected on it. If two or more masters try to control the bus at the same
time, a clock synchronization procedure determines the bus clock, for
which the low period is equal to the longest clock low period and the high
is equal to the shortest one among the masters. The relative priority of
the contending masters is determined by a data arbitration procedure, a
bus master loses arbitration if it transmits logic “1” while another master
transmits logic “0”. The losing masters immediately switch over to slave
receive mode and stop driving SDA output. In this case the transition
Figure
Inter-IC Bus
38, a repeated START signal is a START signal
Figure
MOTOROLA
38).
6-iicbus
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