MC912DG128A Motorola, MC912DG128A Datasheet - Page 156
MC912DG128A
Manufacturer Part Number
MC912DG128A
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC912DG128A.pdf
(404 pages)
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Clock Functions
MC68HC912DT128A Rev 2.0
156
ACQ — Not in Acquisition
PSTP — Pseudo-STOP Enable
LHIE — Limp-Home Interrupt Enable
NOLHM —No Limp-Home Mode
If AUTO = 1 (ACQ is Read Only)
If AUTO = 0
In Pseudo-STOP mode, the oscillator is still running while the MCU is
maintained in STOP mode. This allows for a faster STOP recovery
and reduces the mechanical stress and aging of the resonator in case
frequent STOP conditions at the expense of a slightly increased
power consumption.
Forced to 0 when VDDPLL is at VSS level.
Read anytime; Normal modes: write once; Special modes: write
anytime. Forced to 1 when VDDPLL is at VSS level.
0 = PLL VCO is not within the desired tolerance of the target
1 = After the phase lock loop circuit is turned on, indicates the PLL
0 = High bandwidth PLL loop selected
1 = Low bandwidth PLL loop selected
0 = Pseudo-STOP oscillator mode is disabled
1 = Pseudo-STOP oscillator mode is enabled
0 = Limp-Home interrupt is disabled
1 = Limp-Home interrupt is enabled
0 = Loss of reference clock forces the MCU in limp-home mode.
1 = Loss of reference clock causes standard Clock Monitor reset.
frequency. The loop filter is in high bandwidth, acquisition
mode.
VCO is within the desired tolerance of the target frequency.
The loop filter is in low bandwidth, tracking mode.
Clock Functions
MOTOROLA
22-clock
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