COP8SE National Semiconductor, COP8SE Datasheet - Page 9

• Manufacturer Part Number: COP8SE
• Description: 8-Bit CMOS ROM Based and OTP Microcontrollers with 4k Memory and 128 Bytes EERAM
• Manufacturer: National Semiconductor

AC Electrical Characteristics
Note 16: t
Note 17: Maximum rate of voltage change must be
Note 18: Supply and IDLE currents are measured with CKI driven with a square wave Oscillator, CKO driven 180˚ out of phase with CKI, inputs connected to V
and outputs driven low but not connected to a load.
Note 19: The HALT mode will stop CKI from oscillating in the R/C and the Crystal configurations. In the R/C configuration, CKI is forced high internally. In the crystal
configuration, CKI is TRI-STATE. Measurement of I
puts and not driving a load; all outputs programmed low and not driving a load; all inputs tied to V
via setting bit 7 of the G Port data register.
Note 20: Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages
biased at voltages
pins will not latch up. The voltage at the pins must be limited to
ESD transients.
Note 21: The output propagation delay is referenced to the end of the instruction cycle where the output change occurs.
Note 22: Parameter characterized but not tested.
Note 23: Rise times faster than the minimum specification may trigger an internal power-on-reset.
Note 24: Exclusive of R and C variation.
Note 25: MICROWIRE Setup and Hold Times and Propagation Delays are referenced to the appropriate edge of the MICROWIRE clock. See Figure 4 and the MI-
CROWIRE operation description.
Instruction Cycle Time (t
CKI Clock Duty Cycle (Note 22)
EERAM Write Cycle
Delay from Power-up to first EERAM Write
Cycle
Output Propagation Delay (Note 21)
MICROWIRE Setup Time (t
MICROWIRE Hold Time (t
MICROWIRE Output Propagation Delay
(t
Input Pulse Width (Note 22)
Reset Pulse Width
−40˚C
UPD
Crystal/Resonator, External
R/C Oscillator (Internal)
Rise Time (Note 22)
Fall Time (Note 22)
t
SO, SK
All Others
Interrupt Input High Time
Interrupt Input Low Time
Timer 1 Input High Time
Timer 1 Input Low Time
PD1
Frequency Variation (Note 22), (Note 21)
) (Note 25)
, t
C
PD0
= Instruction cycle time.
T
A
>
+135˚C unless otherwise specified.
V
Parameter
CC
(the pins do not have source current when biased at a voltage below V
C
)
UWH
UWS
) (Note 25)
) (Note 25)
DD
<
HALT is done with device neither sourcing nor sinking current; with L, G0, and G2–G5 programmed as low out-
0.5 V/ms.
FIGURE 4. MICROWIRE/PLUS Timing
<
14V. WARNING: Voltages in excess of 14V will cause damage to the pins. This warning excludes
4.5V
4.5V
4.5V
fr = Max
fr = 10 MHz Ext Clock
fr = 10 MHz Ext Clock
R
pF
4.5V
4.5V
L
= 2.2k, C
Conditions
V
V
V
V
V
CC
CC
CC
CC
CC
9
L
5.5V
5.5V
5.5V
5.5V
5.5V
= 100
CC
CC
; clock monitor disabled. Parameter refers to HALT mode entered
DS100973-9
). The effective resistance to V
Min
45
20
56
>
1
3
1
1
1
1
1
V
CC
and the pins will have sink current to V
Typ
7
CC
is 750
Max
±
220
DC
DC
0.7
1.0
55
12
15
65
8
20
(typical). These two
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CC
Units
ms
µs
µs
ns
ns
µs
µs
µs
ns
ns
ns
µs
%
%
t
t
t
t
when
C
C
C
C
CC