COP8ACC5 National Semiconductor, COP8ACC5 Datasheet - Page 5

• Manufacturer Part Number: COP8ACC5
• Description: 8-Bit CMOS ROM Based Microcontrollers with 4k Memory and High Resolution A/D
• Manufacturer: National Semiconductor

Input Capacitance
Load Capacitance on D2
DC Electrical Characteristics
AC Electrical Characteristics
Note 2: Maximum rate of voltage change must be
Note 3: Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at rails and outputs open.
Note 4: The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations. Measurement of I
sinking current; with L, C, and G0–G5 programmed as low outputs and not driving a load; all outputs programmed low and not driving a load; all inputs tied to V
clock monitor and comparator disabled. Parameter refers to HALT mode entered via setting bit 7 of the G Port data register. Part will pull up CKI during HALT in crystal
clock mode.
Note 5: Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages V
biased at voltages V
will not latch up. The voltage at the pins must be limited to less than 14V. WARNING: Voltages in excess of 14V will cause damage to the pins. This warning
excludes ESD transients.
Note 6: The output propagation delay is referenced to the end of the instruction cycle where the output change occurs.
Note 7: Parameter characterized but not tested.
Note 8: t
0˚C
Instruction Cycle Time (t
R/C Oscillator
Inputs
Output Propagation Delay (Note 6)
MICROWIRE
6)
MICROWIRE Hold Time (t
MICROWIRE Output Propagation Delay
(t
Input Pulse Width (Note 7)
Reset Pulse Width
0˚C
UPD
Crystal, Resonator
t
t
t
SO, SK
All Others
Interrupt Input High Time
Interrupt Input Low Time
Timer 1, 2, 3 Input High Time
Timer 1, 2, 3 Input Low Time
SETUP
HOLD
PD1
)
T
, t
C
A
T
PD0
= Instruction Cycle Time.
A
Parameter
+70˚C unless otherwise specified
+70˚C unless otherwise specified
™
Parameter
CC
Setup Time (t
(the pins do not have source current when biased at a voltage below V
C
)
UWH
UWS
) (Note 6)
) (Note
(Note 6)
(Note 6)
<
0.5V/ms.
2.5V
4V
2.5V
4V
4V
2.5V
4V
2.5V
R
4V
2.5V
4V
2.5V
V
V
V
(Continued)
Conditions
CC
CC
CC
L
= 2.2k, C
V
V
V
V
V
V
Conditions
4V
4V
4V
CC
CC
CC
CC
CC
CC
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
L
5
4V
4V
4V
4V
4V
4V
= 100 pF
CC
). The effective resistance to V
Min
200
500
150
2.5
1.0
7.5
3.0
60
20
56
1
1
1
1
1
Min
CC
DD
and the pins will have sink current to V
HALT is done with device neither sourcing or
Typ
Typ
CC
is 750
Max
1.75
220
DC
DC
DC
DC
0.7
2.5
1000
Max
1
(typical). These two pins
7
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Units
CC
Units
µs
µs
µs
µs
ns
ns
ns
ns
µs
µs
µs
µs
ns
ns
ns
µs
t
t
t
t
pF
pF
C
C
C
C
when
CC
;