COP8ACC5 National Semiconductor, COP8ACC5 Datasheet - Page 11

• Manufacturer Part Number: COP8ACC5
• Description: 8-Bit CMOS ROM Based Microcontrollers with 4k Memory and High Resolution A/D
• Manufacturer: National Semiconductor

Pin Descriptions
V
pins must be connected.
CKI is the clock input. This can come from an R/C generated
oscillator, or a crystal oscillator (in conjunction with CKO).
See Oscillator Description section.
RESET is the master reset input. See Reset description sec-
tion.
The device contains two bidirectional (one 8-bit, one 4-bit)
I/O ports (G and L), where each individual bit may be inde-
pendently configured as a weak pullup input, TRI-STATE
(Hi-Z) input or push pull output under program control. Ports
G- and L- feature Schmitt trigger inputs. Three data memory
address locations are allocated for each of these I/O ports.
Each I/O port has two associated 8-bit memory mapped reg-
isters, the CONFIGURATION register and the output DATA
register. A memory mapped address is also reserved for the
input pins of each I/O port. (See the memory map for the
various addresses associated with the I/O ports.) Figure 5
shows the I/O port configurations. The DATA and CONFIGU-
RATION registers allow for each port bit to be individually
configured under software control as shown below:
PORT L is a 4-bit I/O port. All L-pins have Schmitt triggers on
the inputs.
The Port L supports Multi-Input Wake Up on all four pins.
The Port L has the following alternate features:
L7
L6
L5
L4
Please note:
The lower 4 L-bits read all ones (L0:L3). This is independant
from the states of the associated bits in the L-port Data- and
Configuration register. The lower 4 bits in the L-port Data-
and Configuration register can be used as general purpose
status indicators (flags).
Port G is an 8-bit port with 5 I/O pins (G0, G2–G5), an input
pin (G6), and a dedicated output pin (G7). Pins G0 and
CC
Configuration
Register
and GND are the power supply pins. All V
MIWU or external interrupt
MIWU or external interrupt
MIWU or external interrupt
MIWU or external interrupt
0
0
1
1
FIGURE 5. I/P Port Configurations
Register
Data
0
1
0
1
Hi-Z Input (TRI-STATE Output)
Input with Weak Pull-Up
Push-Pull Zero Output
Push-Pull One Output
Port Set-Up
CC
and GND
DS012865-5
®
11
G2–G6 all have Schmitt Triggers on their inputs. Pin G1
serves as the dedicated WDOUT WATCHDOG output, while
pin G7 is either input or output depending on the oscillator
mask option selected. With the crystal oscillator option se-
lected, G7 serves as the dedicated output pin for the CKO
clock output. With the single-pin R/C oscillator mask option
selected, G7 serves as a general purpose input pin but is
also used to bring the device out of HALT mode with a low to
high transition on G7. There are two registers associated
with the G Port, a data register and a configuration register.
Therefore, each of the 5 I/O bits (G0, G2–G5) can be indi-
vidually configured under software control.
Since G6 is an input only pin and G7 is the dedicated CKO
clock output pin (crystal clock option) or general purpose in-
put (R/C clock option), the associated bits in the data and
configuration registers for G6 and G7 are used for special
purpose functions as outlined below. Reading the G6 and G7
data bits will return zeros.
Note that the chip will be placed in the HALT mode by writing
a “1” to bit 7 of the Port G Data Register. Similarly the chip
will be placed in the IDLE mode by writing a “1” to bit 6 of the
Port G Data Register.
Writing a “1” to bit 6 of the Port G Configuration Register en-
ables the MICROWIRE/PLUS to operate with the alternate
phase of the SK clock. The G7 configuration bit, if set high,
enables the clock start up delay after HALT when the R/C
clock configuration is used.
Port G has the following alternate features:
G6
G5
G4
G3
G2
G0
Port G has the following dedicated functions:
G7
G1
Port I is an eight-bit Hi-Z input port.
Port I0–I7 are used for the analog function block.
The Port I has the following alternate features:
I7
I6
I5
I4
I3
I2
I1
I0
Port D is a 4-bit output port that is preset high when RESET
goes low. The user can tie two or more D port outputs (ex-
cept D2) together in order to get a higher drive.
G7
G6
C
Analog CH6 (Comparator Positive Input 6)
Analog CH5 (Comparator Positive Input 5)
Analog CH4 (Comparator Positive Input 4)
Analog CH3 (Comparator Positive Input 3/Comparator
Output)
Analog CH2 (Comparator Positive Input 2)
I
Analog CH1 (Comparator Positive Input 1)
SRC
SI (MICROWIRE Serial Data Input)
SK (MICROWIRE Serial Clock)
SO (MICROWIRE Serial Data Output)
T1A (Timer T1 I/O)
T1B (Timer T1 Capture Input)
INTR (External Interrupt Input)
CKO Oscillator dedicated output or general purpose
input
WDOUT WATCHDOG and/or Clock Monitor dedicated
output.
OUT
(Comparator Negative Input/Current Source Out)
(Comparator Output)
Config Reg.
Alternate SK
CLKDLY
Data Reg.
HALT
IDLE
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