COP8ACC5 National Semiconductor, COP8ACC5 Datasheet - Page 32

• Manufacturer Part Number: COP8ACC5
• Description: 8-Bit CMOS ROM Based Microcontrollers with 4k Memory and High Resolution A/D
• Manufacturer: National Semiconductor

www.national.com
Memory Map
All RAM, ports and registers (except A and PC) are mapped
into data memory address space.
0000 to 006F
0070 to 007F
xxB8 to xxBF
xx80 to xxAF
S/ADD REG
Address
XXB1
xxCC
xxCD
xxC0
xxC1
xxC2
xxC3
xxC4
xxC5
xxC6
xxC7
xxC8
xxC9
xxCA
xxCB
xxCE
xxCF
xxD0
xxD1
xxD2
xxD3
xxD4
xxD5
xxD6
xxD7
xxD8
xxB0
xxB2
xxB3
xxB4
xxB5
xxB6
xxB7
On-Chip RAM bytes (112
bytes)
Unused RAM Address Space
(Reads As All Ones)
Unused RAM Address Space
(Reads Undefined Data)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Comparator Select Register
(CMPSL)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
WATCHDOG Service Register
(Reg:WDSVR)
MIWU Edge Select Register
(Reg:WKEDG)
MIWU Enable Register
(Reg:WKEN)
MIWU Pending Register
(Reg:WKPND)
Reserved
CAPTLO (Capture Timer
Low-Byte)
CAPTHI (Capture Timer
High-Byte)
CAPCNTL (Capture Timer
Control Register)
Idle Timer Control Register
Port L Data Register
Port L Configuration Register
Port L Input Pins (Read Only)
Reserved
Port G Data Register
Port G Configuration Register
Port G Input Pins (Read Only)
Port I Input Pins (Read Only)
Reserved
Contents
32
Reading memory locations 0070H-007FH (Segment 0) will
return all ones. Reading unused memory locations
0080H-00AFH (Segment 0) will return undefined data. Read-
ing memory locations from other Segments (i.e., Segment 2,
Segment 3,…etc.) will return undefined data.
Addressing Modes
There are ten addressing modes, six for operand addressing
and four for transfer of control.
OPERAND ADDRESSING MODES
Register Indirect
This is the “normal” addressing mode. The operand is the
data memory addressed by the B pointer or X pointer.
Register Indirect (with auto post increment or decre-
ment of pointer)
This addressing mode is used with the LD and X instruc-
tions. The operand is the data memory addressed by the B
pointer or X pointer. This is a register indirect mode that au-
tomatically post increments or decrements the B or X regis-
ter after executing the instruction.
Direct
The instruction contains an 8-bit address field that directly
points to the data memory for the operand.
xxE0 to xxE5
xxF0 to xxFB
S/ADD REG
xxDD to DF
0100-017F
Address
xxDC
xxDA
xxDB
xxEA
xxEB
xxEC
xxED
xxEE
xxFC
xxFD
xxD9
xxE6
xxE7
xxE8
xxE9
xxEF
xxFE
xxFF
Reserved
Reserved
Reserved
Port D
Reserved
Reserved
Timer T1 Autoload Register
T1RB Lower Byte
Timer T1 Autoload Register
T1RB Upper Byte
ICNTRL Register
MICROWIRE/PLUS Shift
Register
Timer T1 Lower Byte
Timer T1 Upper Byte
Timer T1 Autoload Register
T1RA Lower Byte
Timer T1 Autoload Register
T1RA Upper Byte
CNTRL Control Register
PSW Register
On-Chip RAM Mapped as
Registers
X Register
SP Register
B Register
Reserved
Reserved
Contents