ST72T311 ST Microelectronics, ST72T311 Datasheet - Page 83

• Manufacturer Part Number: ST72T311
• Description: 8-BIT MCU WITH 8 TO 16K OTP/EPROM
• Manufacturer: ST Microelectronics

5.2 INSTRUCTION GROUPS
The ST7 family devices use an Instruction Set
consisting of 63 instructions. The instructions may
Using a pre-byte
The instructions are described with one to four
bytes.
In order to extend the number of available op-
codes for an 8-bit CPU (256 opcodes), three differ-
ent prebyte opcodes are defined. These prebytes
modify the meaning of the instruction they pre-
cede.
The whole instruction becomes:
to the number of bytes required to compute the ef-
fective address
Load and Transfer
Stack operation
Increment/Decrement
Compare and Tests
Logical operations
Bit Operation
Conditional Bit Test and Branch
Arithmetic operations
Shift and Rotates
Unconditional Jump or Call
Conditional Branch
Interruption management
Code Condition Flag modification
PC-2
PC-1
PC
PC+1
End of previous instruction
Prebyte
opcode
Additional word (0 to 2) according
LD
PUSH
INC
CP
AND
BSET
BTJT
ADC
SLL
JRA
JRxx
TRAP
SIM
CLR
POP
DEC
TNZ
OR
BRES
BTJF
ADD
SRL
JRT
WFI
RIM
be subdivided into 13 main groups as illustrated in
the following table:
These prebytes enable instruction in Y as well as
indirect addressing modes to be implemented.
They precede the opcode of the instruction in X or
the instruction using direct addressing mode. The
prebytes are:
using immediate, direct, indexed, or inherent ad-
dressing mode by a Y one.
rect, direct bit, or direct relative addressing mode
to an instruction using the corresponding indirect
addressing mode.
It also changes an instruction using X indexed ad-
dressing mode to an instruction using indirect X in-
dexed addressing mode.
direct indexed addressing mode by a Y one.
RSP
BCP
XOR
SUB
SRA
JRF
HALT
SCF
PDY 90
PIX 92
PIY 91
CPL
SBC
RLC
JP
IRET
RCF
Replace an X based instruction
Replace an instruction using di-
Replace an instruction using X in-
NEG
MUL
RRC
CALL
ST72E311 ST72T311
SWAP
CALLR
SLA
NOP
83
RET
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