ST62P08C ST Microelectronics, ST62P08C Datasheet

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ST62P08C

Manufacturer Part Number
ST62P08C
Description
(ST62P08C - ST62P20C) 8-BIT MCU
Manufacturer
ST Microelectronics
Datasheet

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Device Summary
June 2000
Program memory
- bytes
RAM - bytes
Operating Supply
Analog Inputs
Clock Frequency
Operating
Temperature
Packages
Memories
– 1K, 2K or 4K bytes Program memory (OTP,
– 64 bytes RAM
Clock, Reset and Supply Management
– Enhanced reset system
– Low Voltage Detector (LVD) for Safe Reset
– Clock sources: crystal/ceramic resonator or
– Oscillator Safeguard (OSG)
– 2 Power Saving Modes: Wait and Stop
Interrupt Management
– 4 interrupt vectors plus NMI and RESET
– 12 external interrupt lines (on 2 vectors)
12 I/O Ports
– 12 multifunctional bidirectional I/O lines
– 8 alternate function lines
– 4 high sink outputs (20mA)
2 Timers
– Configurable watchdog timer
– 8-bit timer/counter with a 7-bit prescaler
1 Analog peripheral
– 8-bit ADC with 8 input channels (except on
Features
EPROM, FASTROM or ROM) with read-out
protection
RC network, external clock, backup oscillator
(LFAO)
ST6208C)
TWO TIMERS, OSCILLATOR SAFEGUARD & SAFE RESET
ST62P08C(FASTROM)
ST62T08C(OTP)/
ST6208C(ROM)
-
1K
PDIP20/SO20/SSOP20
ST62P09C(FASTROM)
ST62T09C(OTP)/
ST6209C (ROM)
8-BIT MCUs WITH A/D CONVERTER,
4
ST62P10C(FASTROM)
-40 C to +125 C
ST62T10C(OTP)/
ST6210C (ROM)
3.0V to 6V
8MHz Max
– 8-bit data manipulation
– 40 basic instructions
– 9 addressing modes
– Bit manipulation
– Full hardware/software development package
Instruction Set
Development Tools
64
2K
(See Section 12.5 for Ordering Information)
ST6208C/ST6209C
ST6210C/ST6220C
ST62P20C(FASTROM)
ST62T20C(OTP)
ST6220C(ROM)
PDIP20/SO20
CDIP20W
SSOP20
PDIP20
SO20
8
4K
ST62E20C(EPROM)
CDIP20W
Rev. 3.0
1/105
1

Related parts for ST62P08C

ST62P08C Summary of contents

Page 1

... Timers – Configurable watchdog timer – 8-bit timer/counter with a 7-bit prescaler 1 Analog peripheral – 8-bit ADC with 8 input channels (except on ST6208C) Device Summary ST62T08C(OTP)/ Features ST6208C(ROM) ST62P08C(FASTROM) ST62P09C(FASTROM) Program memory 1K - bytes RAM - bytes Operating Supply Analog Inputs - Clock Frequency Operating ...

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INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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POWER SAVING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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INSTRUCTION SET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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TIMER PERIPHERAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 11.10.1Watchdog ...

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... OTP/EPROM versions in the ROM option list (See Section 12.6 on page 96). The ST62P08C/P09C/P10C/P20C are the Factory Advanced Service Technique ROM (FASTROM) versions of ST62T08C, T09C, T10C and T20C OTP devices. They offer the same functionality as OTP devices, but they do not have to be programmed by the customer (See Section 12 on page 90) ...

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PIN DESCRIPTION Figure 2. 20-Pin Package Pinout V Ain*/PB7 Ain*/PB6 Ain*/PB5 itX associated interrupt vector * Depending on device. See device summary on page 1 Table 1. Device Pin Description Pin n Pin Name Main power ...

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ST6208C/ST6209C/ST6210C/ST6220C Pin n Pin Name 19 PA0/ 20mA Sink I/O Pin A0 (IPU Ground SS Legend / Abbreviations for Table 1: * Depending on device. See device summary on page input output, ...

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MEMORY MAPS, PROGRAMMING MODES AND OPTION BYTES 3.1 MEMORY AND REGISTER MAPS 3.1.1 Introduction The MCU operates in three separate memory spaces: Program space, Data space, and Stack space. Operation in these three memory spaces is described in the ...

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ST6208C/ST6209C/ST6210C/ST6220C MEMORY MAP (Cont’d) Figure 4. Program Memory Map ST6208C, 09C 0000h NOT IMPLEMENTED 0AFFh 0B00h * RESERVED 0B9Fh 0BA0h USER PROGRAM MEMORY 1024 BYTES 0F9Fh 0FA0h * RESERVED 0FEFh 0FF0h INTERRUPT VECTORS 0FF7h 0FF8h * RESERVED 0FFBh 0FFCh NMI ...

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MEMORY MAP (Cont’d) 3.1.2 Program Space Program Space comprises the instructions to be executed, the data required for immediate ad- dressing mode instructions, the reserved factory test area and the user vectors. Program Space is addressed via the 12-bit Program ...

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ST6208C/ST6209C/ST6210C/ST6220C MEMORY MAP (Cont’d) Table 2. Hardware Register Map Register Address Block Label 080h CPU X,Y,V,W to 083h 0C0h DRA I/O Ports 0C1h DRB 0C2h 0C3h 2) 0C4h DDRA I/O Ports 2) 0C5h DDRB ...

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MEMORY MAP (Cont’d) 3.1.6 Data ROM Window The Data read-only memory window is located from address 0040h to address 007Fh in Data space. It allows direct reading of 64 consecutive bytes located anywhere in program memory, be- tween address 0000h ...

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ST6208C/ST6209C/ST6210C/ST6220C MEMORY MAP (Cont’d) 3.1.6.2 Data ROM Window memory addressing In cases where some data (look-up tables for ex- ample) are stored in program memory, reading these data requires the use of the Data ROM win- dow mechanism ...

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PROGRAMMING MODES 3.2.1 Program Memory EPROM/OTP programming mode is set by a +12.5V voltage applied to the TEST/V programming flow of the ST62T08C,T09C,T10C, T20C and E20C is described in the User Manual of the EPROM Programming Board. Table 3. ...

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ST6208C/ST6209C/ST6210C/ST6220C 3.3 OPTION BYTES Each device is available for production in user pro- grammable versions (OTP) as well as in factory coded versions (ROM). OTP devices are shipped to customers with a default content (00h), while ROM factory coded parts ...

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CENTRAL PROCESSING UNIT 4.1 INTRODUCTION The CPU Core of ST6 devices is independent of the I/O or Memory configuration. As such, it may be thought independent central processor communicating with on-chip I/O, Memory and Pe- ripherals ...

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ST6208C/ST6209C/ST6210C/ST6220C CPU REGISTERS (Cont’d) The 12-bit length allows the direct addressing of 4096 bytes in Program Space. However, if the program space contains more than 4096 bytes, the additional memory in program space can be addressed by using the Program ...

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CLOCKS, SUPPLY AND RESET 5.1 CLOCK SYSTEM The main oscillator of the MCU can be driven by any of these clock sources: – external clock signal – external AT-cut parallel-resonant crystal – external ceramic resonator – external RC network ...

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ST6208C/ST6209C/ST6210C/ST6220C CLOCK SYSTEM (Cont’d) 5.1.1 Main Oscillator The oscillator configuration is specified by select- ing the appropriate option in the option bytes (refer to the Option Bytes section of this document). When the CRYSTAL/RESONATOR option is se- lected, it must ...

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CLOCK SYSTEM (Cont’d) 5.1.2 Oscillator Safeguard (OSG) The Oscillator Safeguard (OSG) feature is a means of dramatically improving the operational integrity of the MCU available when the OSG ENABLED option is selected in the option byte (re- fer ...

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ST6208C/ST6209C/ST6210C/ST6220C CLOCK SYSTEM (Cont’d) 5.1.3 Low Frequency Auxiliary Oscillator (LFAO) The Low Frequency Auxiliary Oscillator has three main purposes. Firstly, it can be used to reduce power consumption in non timing critical routines. Secondly, it offers a fully integrated system ...

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LOW VOLTAGE DETECTOR (LVD) The on-chip Low Voltage Detector is enabled by setting a bit in the option bytes (refer to the Option Bytes section of this document). The LVD allows the device to be used without any external ...

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ST6208C/ST6209C/ST6210C/ST6220C 5.3 RESET 5.3.1 Introduction The MCU can be reset in three ways: A low pulse input on the RESET pin Internal Watchdog reset Internal Low Voltage Detector (LVD) reset 5.3.2 RESET sequence The basic RESET sequence consists of 3 ...

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RESET (Cont’d) 5.3.3 RESET Pin The RESET pin may be connected to a device on the application board in order to reset the MCU if required. The RESET pin may be pulled low in RUN, WAIT or STOP mode. This ...

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ST6208C/ST6209C/ST6210C/ST6220C RESET (Cont’d) 5.3.4 Watchdog Reset The MCU provides a Watchdog timer function in order to be able to recover from software hang- ups. If the Watchdog register is not refreshed be- fore an end-of-count condition is reached, a Watchdog ...

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INTERRUPTS The ST6 core may be interrupted by four maska- ble interrupt sources, in addition to a Non Maska- ble Interrupt (NMI) source. The interrupt process- ing flowchart is shown in Figure 18. Maskable interrupts must be enabled by ...

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ST6208C/ST6209C/ST6210C/ST6220C 6.1 INTERRUPT RULES AND MANAGEMENT A Reset can interrupt the NMI and peripheral interrupt routines The Non Maskable Interrupt request has the highest priority and can interrupt any peripheral interrupt routine at any time but cannot interrupt another NMI ...

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EXTERNAL INTERRUPTS (I/O Ports) External interrupt vectors can be loaded into the PC register if the corresponding external interrupt occurred and if the GEN bit is set. These interrupts allow the processor to exit from STOP mode. The external ...

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ST6208C/ST6209C/ST6210C/ST6220C 6.6 INTERRUPT HANDLING PROCEDURE The interrupt procedure is very similar to a call pro- cedure, in fact the user can consider the interrupt as an asynchronous call procedure. As this is an asynchronous event, the user cannot know the ...

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REGISTER DESCRIPTION INTERRUPT OPTION REGISTER (IOR) Address: 0C8h — Write Only Reset status: 00h 7 - LES ESB GEN - - Caution: This register is write-only and cannot be accessed by single-bit operations (SET, RES, DEC,...). Bit 7 =Reserved, ...

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ST6208C/ST6209C/ST6210C/ST6220C 7 POWER SAVING MODES 7.1 INTRODUCTION To give a large measure of flexibility to the applica- tion in terms of power consumption, two main pow- er saving modes are implemented in the ST6 (see Figure 19). In addition, the ...

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WAIT MODE The MCU goes into WAIT mode as soon as the WAIT instruction is executed. This has the follow- ing effects: – Program execution is stopped, the microcontrol- ler software can be considered as being in a “fro- ...

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ST6208C/ST6209C/ST6210C/ST6220C 7.3 STOP MODE STOP mode is the lowest power consumption mode of the MCU (see Figure 22). The MCU goes into STOP mode as soon as the STOP instruction is executed. This has the follow- ing effects: – Program ...

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STOP MODE (Cont’d) Figure 22. STOP Mode Flow-chart EXCTNL 1) VALUE 0 0 OSCILLATOR Clock to PERIPHERALS Clock to CPU Y N RESET N INTERRUPT Y Notes: 1. EXCTNL is an option bit. See option byte section for more details. ...

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ST6208C/ST6209C/ST6210C/ST6220C 7.4 NOTES RELATED TO WAIT AND STOP MODES 7.4.1 Exit from Wait and Stop Modes 7.4.1.1 NMI Interrupt It should be noted that when the GEN bit in the IOR register is low (interrupts disabled), the NMI interrupt is ...

Page 37

I/O PORTS 8.1 INTRODUCTION Each I/O port contains pins. Each pin can be programmed independently as digital input (with or without pull-up and interrupt generation), digital output (open drain, push-pull) or analog in- put (when available). ...

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ST6208C/ST6209C/ST6210C/ST6220C I/O PORTS (Cont’d) Figure 23. I/O Port Block Diagram RESET DATA DIRECTION REGISTER DATA REGISTER ST6 INTERNAL BUS OPTION REGISTER TO INTERRUPT * TO ADC * Depending on device. See device summary on page 1. Table 9. I/O Port ...

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I/O PORTS (Cont’d) 8.2.5 Instructions NOT to be used to access Port Data registers (SET, RES, INC and DEC) DO NOT USE SINGLE-BIT INSTRUCTIONS (SET, RES, INC and DEC) ON PORT DATA REG- ISTERS IF ANY PIN OF THE PORT ...

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ST6208C/ST6209C/ST6210C/ST6220C I/O PORTS (Cont’d) Table 10. I/O Port Option Selections MODE AVAILABLE ON Input PA0-PA3 PB0-PB7 DDRx ORx DRx Reset state Input PA0-PA3 with pull up PB0-PB7 DDRx ORx DRx Input with pull up ...

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I/O PORTS (Cont’d) 8.5 REGISTER DESCRIPTION DATA REGISTER (DR) Port x Data Register DRx with Read/Write Reset Value: 0000 0000 (00h Bits 7:0 = D[7:0] Data register bits. ...

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ST6208C/ST6209C/ST6210C/ST6220C 9 ON-CHIP PERIPHERALS 9.1 WATCHDOG TIMER (WDG) 9.1.1 Introduction The Watchdog timer is used to detect the occur- rence of a software fault, usually generated by ex- ternal interference or by unforeseen logical condi- tions, which causes the application ...

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WATCHDOG TIMER (Cont’d) 9.1.3 Functional Description The watchdog activation is selected through an option in the option bytes: – HARDWARE watchdog option After reset, the watchdog is permanently active, the C bit in the WDGR is forced high and the ...

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ST6208C/ST6209C/ST6210C/ST6220C WATCHDOG TIMER (Cont’d) These instructions test the C bit and reset the MCU (i.e. disable the Watchdog) if the bit is set (i.e. if the Watchdog is active), thus disabling the Watchdog. For more information on the use of ...

Page 45

WATCHDOG TIMER (Cont’d) 9.1.7 Register Description WATCHDOG REGISTER (WDGR) Address: 0D8h - Read/Write Reset Value: 1111 1110 (FEh Bit 0= C Watchdog Control bit . If the hardware option is selected (WDACT bit ...

Page 46

ST6208C/ST6209C/ST6210C/ST6220C 9.2 8-BIT TIMER 9.2.1 Introduction The 8-Bit Timer on-chip peripheral is a free run- ning downcounter based on an 8-bit downcounter with a 7-bit programmable prescaler, giving a max- 15 imum count The peripheral may be ...

Page 47

TIMER (Cont’d) 9.2.3 Counter/Prescaler Description Prescaler The prescaler input can be the internal frequency f divided external clock applied to INT the TIMER pin. The prescaler decrements on the rising edge, depending on the division ...

Page 48

ST6208C/ST6209C/ST6210C/ST6220C 8-BIT TIMER (Cont’d) 9.2.4 Functional Description There are three operating modes, which are se- lected by the TOUT and DOUT bits (see TSCR register). These three modes correspond to the two clocks which can be connected to the 7-bit ...

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TIMER (Cont’d) 9.2.4.2 Event counter mode (TOUT = “0”, DOUT = “0”) In this mode, the TIMER pin is the input clock of the Timer prescaler which is decremented on eve- ry rising edge of the input clock (allowing ...

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ST6208C/ST6209C/ST6210C/ST6220C 8-BIT TIMER (Cont’d) 9.2.5 Low Power Modes Mode Description No effect on timer. WAIT Timer interrupt events cause the device to exit from WAIT mode. Timer registers are frozen except in Event STOP Counter mode (with external clock on ...

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TIMER (Cont’d) 9.2.7 Register Description PRESCALER COUNTER REGISTER (PSCR) Address: 0D2h - Read/Write Reset Value: 0111 1111 (7Fh) 7 PSCR PSCR PSCR PSCR PSCR PSCR Bit 7 = PSCR7: Not used, always read ...

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ST6208C/ST6209C/ST6210C/ST6220C 9.3 A/D CONVERTER (ADC) 9.3.1 Introduction The on-chip Analog to Digital Converter (ADC) pe- ripheral is a 8-bit, successive approximation con- verter. This peripheral has multiplexed analog in- put channels (refer to device pin out description) that allow the ...

Page 53

A/D CONVERTER (Cont’d) 9.3.3 Functional description 9.3.3.1 Analog Power Supply The high and low level reference voltage pins are internally connected to the V and V DD Conversion accuracy may therefore be impacted by voltage drops and noise in the ...

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ST6208C/ST6209C/ST6210C/ST6220C A/D CONVERTER (Cont’d) 9.3.4 Recommendations The following six notes provide additional informa- tion on using the A/D converter. 1.The A/D converter does not feature a sample and hold circuit. The analog voltage to be meas- ured should therefore be ...

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A/D CONVERTER (Cont’d) 9.3.5 Low power modes Mode Description No effect on A/D Converter. ADC interrupts WAIT cause the device to exit from Wait mode. STOP A/D Converter disabled. Note: The A/D converter may be disabled by clear- ing the ...

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ST6208C/ST6209C/ST6210C/ST6220C 10 INSTRUCTION SET 10.1 ST6 ARCHITECTURE The ST6 architecture has been designed for max- imum efficiency while keeping byte usage to a minimum; in short, to provide byte-efficient pro- gramming. The ST6 core has the ability to set or ...

Page 57

INSTRUCTION SET The ST6 offers a set of 40 basic instructions which, when combined with nine addressing modes, yield 244 usable opcodes. They can be di- vided into six different types: load/store, arithme- tic/logic, conditional branch, control instructions, jump/call, ...

Page 58

ST6208C/ST6209C/ST6210C/ST6220C INSTRUCTION SET (Cont’d) Arithmetic and Logic. These instructions are used to perform arithmetic calculations and logic operations. In AND, ADD, CP, SUB instructions one operand is always the accumulator while, de- pending on the addressing mode, the other can ...

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INSTRUCTION SET (Cont’d) Conditional Branch. Branch instructions perform a branch in the program when the selected condi- tion is met. Bit Manipulation Instructions. These instruc- tions can handle any bit in Data space memory. One group either sets or clears. ...

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ST6208C/ST6209C/ST6210C/ST6220C Opcode Map Summary. The following table contains an opcode map for the instructions used by the ST6 LOW 0 1 0000 0001 0010 HI 2 JRNZ 4 CALL abc 0000 1 pcr 2 ext 1 2 ...

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Opcode Map Summary (Continued) LOW 8 9 1000 1001 1010 HI 2 JRNZ abc 0000 1 pcr 2 ext 1 2 JRNZ abc 0001 1 pcr 2 ext 1 2 ...

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ST6208C/ST6209C/ST6210C/ST6220C 11 ELECTRICAL CHARACTERISTICS 11.1 PARAMETER CONDITIONS Unless otherwise specified, all voltages are re- ferred 11.1.1 Minimum and Maximum values Unless otherwise specified the minimum and max- imum values are guaranteed in the worst condi- tions ...

Page 63

ABSOLUTE MAXIMUM RATINGS Stresses above those listed as “absolute maxi- mum ratings” may cause permanent damage to the device. This is a stress rating only and func- tional operation of the device under these condi- 11.2.1 Voltage Characteristics Symbol ...

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ST6208C/ST6209C/ST6210C/ST6220C 11.3 OPERATING CONDITIONS 11.3.1 General Operating Conditions Symbol Parameter V Supply voltage DD f Oscillator frequency OSC V Operating Supply Voltage DD T Ambient temperature range A Notes oscillator frequency above 1.2MHz is recommended for reliable A/D ...

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OPERATING CONDITIONS (Cont’d) 11.3.2 Operating Conditions with Low Voltage Detector (LVD) Subject to general operating conditions for V Symbol Parameter Reset release threshold V IT+ (V rise) DD Reset generation threshold V IT- (V fall LVD voltage threshold ...

Page 66

ST6208C/ST6209C/ST6210C/ST6220C 11.4 SUPPLY CURRENT CHARACTERISTICS The following current consumption specified for the ST6 functional operating modes over tempera- ture range does not take into account the clock source current consumption. To get the total de- 11.4.1 RUN Modes Symbol Parameter ...

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SUPPLY CURRENT CHARACTERISTICS (Cont’d) 11.4.2 WAIT Modes Symbol Parameter 3) Supply current in WAIT mode Option bytes not programmed (see Figure 44) 3) Supply current in WAIT mode Option bytes programmed to 00H (see Figure 45) 3) Supply current in ...

Page 68

ST6208C/ST6209C/ST6210C/ST6220C SUPPLY CURRENT CHARACTERISTICS (Cont’d) Figure 44. Typical I in WAIT programmed IDD [ A] 800 8MHz 1M 700 4MHz 32KHz 2MHz 600 500 400 300 200 100 VDD [V] Figure 45. Typical ...

Page 69

SUPPLY CURRENT CHARACTERISTICS (Cont’d) Figure 46. Typical I in WAIT IDD [ A] 600 8MHz 1M 4MHz 32KHz 500 2MHz 400 300 200 100 VDD [V] ST6208C/ST6209C/ST6210C/ST6220C and Temperature for ROM devices CPU ...

Page 70

ST6208C/ST6209C/ST6210C/ST6220C SUPPLY CURRENT CHARACTERISTICS (Cont’d) 11.4.3 STOP Mode Symbol Parameter Supply current in STOP mode I DD (see Figure 47 & Figure 48) Notes: 1. Typical data are based on V =5. All I/O pins in ...

Page 71

SUPPLY CURRENT CHARACTERISTICS (Cont’d) 11.4.4 Supply and Clock System The previous current consumption specified for the ST6 functional operating modes over tempera- ture range does not take into account the clock Symbol Parameter Supply current of RC oscillator I DD(CK) ...

Page 72

ST6208C/ST6209C/ST6210C/ST6220C 11.5 CLOCK AND TIMING CHARACTERISTICS Subject to general operating conditions for V 11.5.1 General Timings Symbol Parameter t Instruction cycle time c(INST) 2) Interrupt reaction time t v(IT v(IT) c(INST) 11.5.2 External Clock Source ...

Page 73

CLOCK AND TIMING CHARACTERISTICS (Cont’d) 11.5.3 Crystal and Ceramic Resonator Oscillators The ST6 internal clock can be supplied with sever- al different Crystal/Ceramic resonator oscillators. All the information given in this paragraph are based on characterization results with specified Symbol ...

Page 74

ST6208C/ST6209C/ST6210C/ST6220C CLOCK AND TIMING CHARACTERISTICS (Cont’d) 11.5.4 RC Oscillator The ST6 internal clock can be supplied with an ex- ternal RC oscillator. Symbol Parameter oscillator frequency OSC R RC Oscillator external resistor NET Notes: 1. Data based ...

Page 75

CLOCK AND TIMING CHARACTERISTICS (Cont’d) Figure 52. Typical RC Oscillator frequency vs. R NET Rnet=22KOhm fosc [MHz] Rnet=47KOhm 12 Rnet=100KOhm 10 Rnet=220KOhm 8 Rnet=470KOhm VDD [V] 11.5.5 Oscillator Safeguard (OSG) and Low Frequency ...

Page 76

ST6208C/ST6209C/ST6210C/ST6220C 11.6 MEMORY CHARACTERISTICS Subject to general operating conditions for V 11.6.1 RAM and Hardware Registers Symbol Parameter 1) V Data retention RM 11.6.2 EPROM Program Memory Symbol Parameter 2) t Data retention ret Figure 55. EPROM Retention Time vs. ...

Page 77

EMC CHARACTERISTICS Susceptibility tests are performed on a sample ba- sis during product characterization. 11.7.1 Functional EMS (Electro Magnetic Susceptibility) Based on a simple running application on the product (toggling 2 LEDs through I/O ports), the product is stressed ...

Page 78

ST6208C/ST6209C/ST6210C/ST6220C EMC CHARACTERISTICS (Cont’d) 11.7.2 Absolute Electrical Sensitivity Based on three different tests (ESD, LU and DLU) using specific measurement methods, the product is stressed in order to determine its performance in terms of electrical sensitivity. For more details, re- ...

Page 79

EMC CHARACTERISTICS (Cont’d) 11.7.2.2 Static and Dynamic Latch-Up LU: 3 complementary static tests are required on 10 parts to assess the latch-up performance. A supply overvoltage (applied to each power supply pin), a current injection (applied to each input, output ...

Page 80

ST6208C/ST6209C/ST6210C/ST6220C EMC CHARACTERISTICS (Cont’d) 11.7.3 ESD Pin Protection Strategy To protect an integrated circuit against Electro- Static Discharge the stress must be controlled to prevent degradation or destruction of the circuit el- ements. The stress generally affects the circuit el- ...

Page 81

I/O PORT PIN CHARACTERISTICS 11.8.1 General Characteristics Subject to general operating conditions for V Symbol Parameter 2) V Input low level voltage Input high level voltage IH V Schmitt trigger voltage hysteresis hys I Input leakage ...

Page 82

ST6208C/ST6209C/ST6210C/ST6220C I/O PORT PIN CHARACTERISTICS (Cont’d) 11.8.2 Output Driving Current Subject to general operating conditions for V Symbol Parameter Output low level voltage for a standard I/O pin (see Figure 63 and Figure 66 Output low level ...

Page 83

I/O PORT PIN CHARACTERISTICS (Cont’d) Figure 65. Typical Voh [V] at Vdd=5V 5 4.5 4 3.5 -8 Figure 66. Typical (standard I/Os Vol [mV] at Iio=2mA Ta=-40 C ...

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ST6208C/ST6209C/ST6210C/ST6220C I/O PORT PIN CHARACTERISTICS (Cont’d) Figure 68. Typical Voh [V] at Iio=-2mA Ta=- Ta= VDD [V] 84/105 1 Voh [V] at Iio=-5mA 6 5 ...

Page 85

CONTROL PIN CHARACTERISTICS 11.9.1 Asynchronous RESET Pin Subject to general operating conditions for V Symbol Parameter 2) V Input low level voltage Input high level voltage IH V Schmitt trigger voltage hysteresis hys R Weak pull-up ...

Page 86

ST6208C/ST6209C/ST6210C/ST6220C CONTROL PIN CHARACTERISTICS (Cont’d) Figure 70. Typical Application with RESET pin 0.1 F 4.7k EXTE RNAL RESET 7) CIRCUIT 0.1 F 11.9.2 NMI Pin Subject to general operating conditions for V Symbol Parameter 2) V ...

Page 87

CONTROL PIN CHARACTERISTICS (Cont’d) 11.10 TIMER PERIPHERAL CHARACTERISTICS Subject to general operating conditions for and T unless otherwise specified. OSC A 11.10.1 Watchdog Timer Symbol Parameter t Watchdog time-out duration w(WDG) 11.10.2 8-Bit Timer Symbol Parameter f ...

Page 88

ST6208C/ST6209C/ST6210C/ST6220C 11.11 8-BIT ADC CHARACTERISTICS Subject to general operating conditions for V Symbol Parameter f Clock frequency OSC 2) V Conversion range voltage AIN R External input resistor AIN t Total convertion time ADC 4) t Stabilization time STAB Analog ...

Page 89

ADC CHARACTERISTICS (Cont’d) ADC Accuracy Symbol Parameter Total unadjusted error Offset error Gain Error Differential linearity error Integral linearity error L Notes: ...

Page 90

ST6208C/ST6209C/ST6210C/ST6220C 12 GENERAL INFORMATION 12.1 PACKAGE MECHANICAL DATA Figure 74. 20-Pin Plastic Dual In-Line Package, 300-mil Width Figure 75. 20-Pin Ceramic Side-Brazed Dual In-Line Package 90/105 1 mm Dim. Min Typ Max A 5.33 A1 0.38 A2 2.92 3.30 4.95 ...

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PACKAGE MECHANICAL DATA (Cont’d) Figure 76. 20-Pin Plastic Small Outline Package, 300-mil Width Figure 1. 20-Pin Plastic Shrink Small Outline Package ST6208C/ST6209C/ST6210C/ST6220C mm Dim. Min Typ Max Min A 2.35 2.65 0.0926 A1 0.10 0.0040 B 0.33 0.51 0.0130 C ...

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ST6208C/ST6209C/ST6210C/ST6220C 12.2 THERMAL CHARACTERISTICS Symbol Package thermal resistance (junction to ambient) DIP20 R thJA SO20 SSOP20 P Power dissipation D T Maximum junction temperature Jmax Notes: 1. The power dissipation is obtained from the formula P and P is the ...

Page 93

SOLDERING AND GLUEABILITY INFORMATION Recommended soldering information given only as design guidelines in Figure 2 and Figure 3. Figure 2. Recommended Wave Soldering Profile (with 37% Sn and 63% Pb) 250 200 150 80 C Temp 100 ...

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ST6208C/ST6209C/ST6210C/ST6220C 12.4 PACKAGE/SOCKET FOOTPRINT PROPOSAL Table 23. Suggested List of DIP20 Socket Types Package / Probe Adaptor / Socket Reference DIP20 TEXTOOL Table 24. Suggested List of SO20 Socket Types Package / Probe Adaptor / Socket Reference ENPLAS SO20 YAMAICHI ...

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ORDERING INFORMATION The following section deals with the procedure for transfer of customer codes to STMicroelectronics Figure 4. ST6 Factory Coded Device Types ST62T20CB6/CCC ST6208C/ST6209C/ST6210C/ST6220C and also details the ST6 factory coded device type. ROM code Temperature code: 1: ...

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... STMicroelectronics. The signed listing forms a part of the contractual agreement for the production of the specific customer MCU. 12.6.1 FASTROM version The ST62P08C/P09C/P10C and P20C are the Factory Advanced Service Technique ROM (FAS- TROM) versions of ST62T08C, T09C, T10C and T20C OTP devices. ...

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... Reference STMicroelectronics references: Device ST62P08C (1KB ST62P09C (1KB ST62P10C (2KB ST62P20C (4KB) Package: Conditioning option: ...

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ST6208C/ST6209C/ST6210C/ST6220C TRANSFER OF CUSTOMER CODE (Cont’d) 12.6.2 ROM VERSION The ST6208C, 09C, 10C and 20C are mask pro- grammed ROM version of ST62T08C, T09C, T10C and T20C OTP devices. They offer the same functionality as OTP devices, selecting as ROM ...

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TRANSFER OF CUSTOMER CODE (Cont’d) ST6208C, 09C, 10C and 20C MICROCONTROLLER OPTION LIST Customer ...

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ST6208C/ST6209C/ST6210C/ST6220C 13 DEVELOPMENT TOOLS STMicroelectronics offers a range of hardware and software development tools for the ST6 micro- controller family. Full details of tools available for the ST6 from third party manufacturers can be ob- tain from the STMicroelectronics Internet ...

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DEVELOPMENT TOOLS (Cont’d) STMicroelectronics Tools Four types of development tool are offered by ST, all of them connect via a parallel or serial port: see Table 27 and Table 28 for more details. Table 27. STMicroelectronics Tool ...

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ST6208C/ST6209C/ST6210C/ST6220C 14 ST6 APPLICATION NOTES IDENTIFICATION MOTOR CONTROL AN392 MICROCONTROLLER AND TRIACS ON THE 110/240V MAINS AN414 CONTROLLING A BRUSH DC MOTOR WITH AN ST6265 MCU AN416 SENSORLESS MOTOR DRIVE WITH THE ST62 MCU + TRIAC AN422 IMPROVES UNIVERSAL MOTOR ...

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IDENTIFICATION PERIPHERAL OPERATIONS AN590 PWM GENERATION WITH ST62 AUTO-RELOAD TIMER AN591 INPUT CAPTURE WITH ST62 AUTO-RELOAD TIMER AN592 PLL GENERATION USING THE ST62 AUTO-RELOAD TIMER AN593 ST62 IN-CIRCUIT PROGRAMMING AN678 LCD DRIVING WITH ST6240 AN913 PWM GENERATION WITH ST62 16-BIT ...

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ST6208C/ST6209C/ST6210C/ST6220C 15 SUMMARY OF CHANGES Description of the changes between the current release of the specification and the previous one. Revision Complementary information added to the functional description throughout the document in the form of explanatory application notes. Added graphic ...

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Notes: Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its ...

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