SAF-C161S Infineon Technologies, SAF-C161S Datasheet - Page 59
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SAF-C161S
Manufacturer Part Number
SAF-C161S
Description
16-Bit CMOS Microcontroller
Manufacturer
Infineon Technologies
Datasheet
1.SAF-C161S.pdf
(75 pages)
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Table 17
ALE cycle time = 6 TCL + 2
Parameter
Data valid to WrCS
Data hold after RdCS
Data float after RdCS
Address hold after
RdCS, WrCS
Data hold after WrCS
1) These parameters refer to the latched chip select signals (CSxL). The early chip select signals (CSxE) are
Data Sheet
specified together with the address and signal BHE (see figures below).
Multiplexed Bus (Reduced Supply Voltage Range) (cont’d)
(Operating Conditions apply)
Symbol
t
t
t
t
t
50
51
52
54
56
t
A
+
t
C
CC 28 +
SR 0
SR –
CC 30 +
CC 30 +
+
t
F
Min.
Max. CPU Clock
(150 ns at 20 MHz CPU clock without waitstates)
= 20 MHz
55
t
t
t
C
F
F
Max.
–
–
30 +
–
–
t
F
1 / 2TCL = 1 to 20 MHz
Min.
2TCL - 22
+
0
–
2TCL - 20
+
2TCL - 20
+
Variable CPU Clock
t
t
t
C
F
F
Timing Characteristics
Max.
–
–
2TCL - 20
+
–
–
t
F
V1.0, 2003-11
C161S
Unit
ns
ns
ns
ns
ns