HCPL-316 ETC, HCPL-316 Datasheet - Page 31
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HCPL-316
Manufacturer Part Number
HCPL-316
Description
2.0 Amp Gate Drive Optocoupler with Integrated (VCE) Desaturation Detection and Fault Status Feedback
Manufacturer
ETC
Datasheet
1.HCPL-316.pdf
(32 pages)
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Printed Circuit Board
Layout Considerations
Adequate spacing should always
be maintained between the high
voltage isolated circuitry and any
input referenced circuitry. Care
must be taken to provide the
same minimum spacing between
two adjacent high-side isolated
regions of the printed circuit
board. Insufficient spacing will
reduce the effective isolation and
increase parasitic coupling that
will degrade CMR performance.
The placement and routing of
supply bypass capacitors requires
special attention. During switch-
ing transients, the majority of the
gate charge is supplied by the
Figure 79. Recommended Layout(s).
bypass capacitors. Maintaining
short bypass capacitor trace
lengths will ensure low supply
ripple and clean switching
waveforms.
Ground Plane connections are
necessary for pin 4 (GND1) and
pins 9 and 10 (V
achieve maximum power
dissipation as the HCPL-316J is
designed to dissipate the majority
of heat generated through these
pins. Actual power dissipation
will depend on the application
environment (PCB layout, air
flow, part placement, etc.) See
the Thermal Model section for
EE
) in order to
31
details on how to estimate
junction temperature.
The layout examples below have
good supply bypassing and
thermal properties, exhibit small
PCB footprints, and have easily
connected signal and supply
lines. The four examples cover
single sided and double sided
component placement, as well as
minimal and improved
performance circuits.