HCPL-316 ETC, HCPL-316 Datasheet - Page 26

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HCPL-316

Manufacturer Part Number
HCPL-316
Description
2.0 Amp Gate Drive Optocoupler with Integrated (VCE) Desaturation Detection and Fault Status Feedback
Manufacturer
ETC
Datasheet

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Local Shutdown, Local Reset
As shown in Figure 70, the fault
output of each HCPL-316J gate
driver is polled separately, and
the individual reset lines are
asserted low independently to
reset the motor controller after a
fault condition.
Global-Shutdown, Global
Reset
As shown in Figure 71, when
configured for inverting
operation, the HCPL-316J can be
configured to shutdown
automatically in the event of a
fault condition by tying the
FAULT output to V
reliability drives, the open
collector FAULT outputs of each
HCPL-316J can be wire ‘OR’ed
together on a common fault bus,
forming a single fault bus for
interfacing directly to the micro-
controller. When any of the six
gate drivers detects a fault, the
fault output signal will disable all
six HCPL-316J gate drivers
simultaneously and thereby
provide protection against further
catastrophic failures.
Auto-Reset
As shown in Figure 72, when the
inverting V
to ground (non-inverting
configuration), the HCPL-316J
can be configured to reset
automatically by connecting
RESET to V
gate control signal is applied to
the non-inverting input as well as
the reset input to reset the fault
latch every switching cycle.
During normal operation of the
IGBT, asserting the reset input
low has no effect. Following a
fault condition, the gate driver
remains in the latched fault state
until the gate control signal
changes to the ‘gate low’ state
and resets the fault latch. If the
IN-
IN+
input is connected
. In this case, the
IN+
. For high
TO OTHER
CONNECT
Figure 71. Global-Shutdown, Global
Reset Configuration.
Figure 70. Local Shutdown, Local
Reset Configuration.
µC
µC
µC
Figure 72. Auto-Reset Configuration.
RESETS
TO OTHER
CONNECT
FAULTS
+
+
+
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
V
V
V
GND1
RESET
FAULT
V
V
IN+
IN-
CC1
LED1+
LED1-
V
V
V
GND1
RESET
FAULT
V
V
V
V
V
GND1
RESET
FAULT
V
V
IN+
IN-
CC1
LED1+
LED1-
IN+
IN-
CC1
LED1+
LED1-
HCPL-316J
HCPL-316J
HCPL-316J
26
gate control signal is a
continuous PWM signal, the fault
latch will always be reset by the
next time the input signal goes
high. This configuration protects
the IGBT on a cycle-by-cycle
basis and automatically resets
before the next ‘on’ cycle. The
fault outputs can be wire ‘OR’ed
together to alert the
microcontroller, but this signal
would not be used for control
purposes in this (Auto-Reset)
configuration. When the
HCPL- 316J is configured for
Auto-Reset, the guaranteed
minimum FAULT signal pulse
width is 3 s.
Resetting Following a Fault
Condition
To resume normal switching
operation following a fault
condition (FAULT output low),
the RESET pin must first be
asserted low in order to release
the internal fault latch and reset
the FAULT output (high). Prior to
asserting the RESET pin low, the
input (V
be configured for an output (V
low state. This can be handled
directly by the microcontroller or
by hardwiring to synchronize the
RESET signal with the
appropriate input signal. Figure
73a shows how to connect the
RESET to the V
automatic reset in the non-
inverting input configuration.
Figure 73b shows how to
configure the V
so that a RESET signal from the
microcontroller causes the input
to be in the “output-off” state.
Similarly, Figures 73c and 73d
show automatic RESET and
microcontroller RESET safe
configurations for the inverting
input configuration.
IN
) switching signals must
IN+
IN+
/RESET signals
signal for safe
OL
)

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