M66256 Mitsubishi, M66256 Datasheet - Page 6

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M66256

Manufacturer Part Number
M66256
Description
5120 x 8-BIT LINE MEMORY (FIFO)
Manufacturer
Mitsubishi
Datasheet

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6
• Matters that needs attention when WCK stops
Input data of n cycle is read at the rising edge after WCK of n cycle and writing operation starts in the WCK low-level period of
n+1 cycle. The writing operation is complete at the falling edge after n+1 cycle.
To stop reading write data at n cycle, enter WCK before the rising edge after n+1 cycle.
When the cycle next to n cycle is a disable cycle, WCK for a cycle requires to be entered after the disable cycle as well.
WCK
WE
D
n
n cycle
t
WCK
t
DS
Period for writing data (n)
into memory
(n)
t
DH
n+1 cycle
n cycle
t
NWES
t
DS
Period for writing data (n)
into memory
(n)
t
DH
5120
MITSUBISHI DIGITAL ASSP
Disable cycle
8-BIT LINE MEMORY (FIFO)
WRES = “H”
M66256FP

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