M66256 Mitsubishi, M66256 Datasheet - Page 10

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M66256

Manufacturer Part Number
M66256
Description
5120 x 8-BIT LINE MEMORY (FIFO)
Manufacturer
Mitsubishi
Datasheet

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10
• Longest read of data “n” written in cycle n: 1-line delay
Output Qn of n cycle <1>* can be read until the start of reading side n cycle <1>* and the start of writing side n cycle <2>* over-
lap each other.
• Shortest read of data “n” written in cycle n
When the start of cycle n–1 on read side is earlier than the end of cycle n+1 on write side, output Q
In the figure shown below, the read of cycle n–1 is invalid.
Cycle n <1>* on read side should be started when cycle n <2>* on write is started
Cycle n–1 on read side should be started after end of cycle n+1 on write side
WCK
RCK
D
Q
WCK
RCK
D
Q
n
n
n
n
(n–1)<0>*
(n–1)<1>*
Cycle n <1>*
Cycle n <0>*
Cycle n
(n)<0>*
(n)
(n)<1>*
Cycle n–2
Cycle n+1
(n+1)
Cycle 0 <2>*
Cycle 0 <1>*
Cycle n+2
Cycle n–1
(00) <2>*
(0)<1>*
invalid
(n+2)
Cycle n+3
<0>*, <1>* and <2>* indicates a line value.
(n–1)<2>*
5120
MITSUBISHI DIGITAL ASSP
(n–1)<1>*
Cycle n
(n+3)
8-BIT LINE MEMORY (FIFO)
n
of cycle n becomes invalid.
Cycle n <2>*
Cycle n <1>*
(n)
M66256FP
(n)<2>*
(n)<1>*

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