HT82B40A HOLTEK [Holtek Semiconductor Inc], HT82B40A Datasheet - Page 31

• Manufacturer Part Number: HT82B40A
• Description: I/O MCU with USB Interface
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

There is a system clock control register implemented to select the clock used in the MCU. This register consists of the
USB clock control bit, USBCKEN, second suspend mode control bit, SUSP2, and a system clock selection bit,
SYSCLK. The PS2 mode indicate bit, PS2_flag, and a system clock adjust control bit, CLK_adj.
STALL and PIPE, PIPE_CTRL, Endpt_EN Registers
The PIPE register represents whether the corresponding endpoint is accessed by the host or not. After an ACT_EN sig-
nal has been sent out, the MCU can check which endpoint had been accessed. This register is set only after the a time
when the host is accessing the corresponding endpoint.
The STALL register shows whether the corresponding endpoint works or not. As soon as the endpoint works improp-
erly, the corresponding bit must be set.
The PIPE_CTRL Register is used for configuring the IN (Bit=1) or OUT (Bit=0) Pipe. The default is define IN pipe. Bit0
(DATA0) of the PIPE_CTRL Register is used to set the data toggle of any endpoint (except endpoint 0) using data tog-
gles to the value DATA0. Once the user wants any endpoint (except endpoint 0) using data toggles to the value DATA0.
the user can output a LOW pulse to this bit. The LOW pulse period must at least 10 instruction cycles.
The Endpt_EN Register is used to enable or disable the corresponding endpoint (except endpoint 0) Enable Endpoint
(Bit=1) or disable Endpoint (Bit=0)
The bitmaps are list are shown in the following table:
The USB_STAT Register (40H) is used to indicate the present USB signal state.
Rev. 1.10
PIPE_CTRL
STALL
PIPE
Endpt_EN
Bit No.
0, 1, 2
Register
3
4
5
6
7
Name
Bit No.
5~7
0
1
2
3
4
USBCKEN R/W
PS2_flag
SYSCLK
CLK_adj
SUSP2
Label
PIPE_CTRL (41H), STALL (43H), PIPE (44H) and Endpt_EN (47H) Registers
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
Function
01000001B
01000011B
01000100B
01000111B
Reserved bit set 0
USB clock control bit. When this bit is set to 1 , it indicates that the USB clock is en-
abled. Otherwise, the USB clock is turned-off. (Default= 0 )
When set to 1, turn-off Band-gap circuit. Default value is 0.
In the Power-down Mode this bit should be set high to reduce power consumption.The
LVR has no function. In the USB mode this bit cannot be set high.
This flag is used to indicate that the MCU is in the PS2 mode. (Bit=1)
This bit is R/W by FW and will be cleared to 0 after power-on reset. (Default= 0 )
This bit is used to specify the system oscillator frequency used by the MCU. If a 6MHz
crystal oscillator or resonator is used, this bit should be set to 1 . If a 12MHz crystal
oscillator or resonator is used, this bit should be cleared to 0 (default).
This bit is used to adjust the system clock for the USB mode for temperature changes.
In the Power-down Mode this bit should be set high to reduce power consumption.
0: enable (default)
1: disable
K_state
J_state
Register
Address
EOP
SE0
SE1
USB_STAT (40H) Register Table
Reserved
Bit7~Bit3
SCC (22H) Register
31
Read/Write
Pipe 2
Pipe 2
Pipe 2
Pipe 2
Bit 2
R/W
R/W
R/W
R/W
R/W
Function
Pipe 1
Pipe 1
Pipe 1
Pipe 1
Bit 1
HT82B40R/HT82B40A
Register Address
DATA0
Pipe 0
Pipe 0
Pipe 0
Bit 0
01000000B
September 4, 2009
00000111
00000111
00000000
00000111
Default
Value