HT82B40A HOLTEK [Holtek Semiconductor Inc], HT82B40A Datasheet - Page 14

• Manufacturer Part Number: HT82B40A
• Description: I/O MCU with USB Interface
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

change I/O pins from output to input and vice versa by
manipulating specific bits of the I/O control registers dur-
ing normal program operation is a useful feature of
these devices.
Bank Pointer - BP
The Special Purpose Data Memory is divided into two
Banks, Bank 0 and Bank 1. The USB control registers
are located in Bank 1, while all other registers are lo-
cated in Bank 1. The Bank Pointer selects which bank
data is to be accessed from. If Bank 0 is to be accessed
then BP must be set to a value of 00H, while if Bank 1 is
to be accessed then BP must be set to a value of 01H.
Input/Output Ports
Holtek microcontrollers offer considerable flexibility on
their I/O ports. With the input or output designation of ev-
ery pin fully under user program control, pull-high op-
tions for all ports and wake-up options on certain pins,
the user is provided with an I/O structure to meet the
needs of a wide range of application possibilities.
Depending upon which package is chosen, the
microcontroller provides up to 34 bidirectional input/out-
put lines labeled with port names PA, PB, PC, PD and
PE0~PE1.
These I/O ports are mapped to the Data Memory with
addresses as shown in the Special Purpose Data Mem-
ory table. For input operation, these ports are non-latch-
ing, which means the inputs must be ready at the T2
rising edge of instruction MOV A,[m] , where m de-
notes the port address. For output operation, all the data
is latched and remains unchanged until the output latch
is rewritten.
Pull-high Resistors
Many product applications require pull-high resistors for
their switch inputs usually requiring the use of an exter-
nal resistor. To eliminate the need for these external re-
sistors, I/O pins, when configured as an input have the
capability of being connected to an internal pull-high re-
sistor. The pull-high resistors are selectable via configu-
ration options and are implemented using weak PMOS
transistors. A pin or nibble option on the I/O ports can be
selected to select pull-high Resistors.
Rev. 1.10
SET [m].i and CLR [m].i instructions. The ability to
Bank Pointer
14
Port A CMOS/NMOS/PMOS Structure
The pins on Port A can be setup via configuration option
to be either CMOS, NMOS or PMOS types.
Port B VDD/V33O Option Structure
The power supply for the Port B pins can be setup via
configuration option to be either VDD or V33O.
Port Pin Wake-up
If the HALT instruction is executed, the device will enter
the Power Down Mode, where the system clock will stop
resulting in power being conserved, a feature that is im-
portant for battery and other low-power applications.
Various methods exist to wake-up the microcontroller,
one of which is to change the logic condition on one of
the port pins from high to low. After a HALT instruction
forces the microcontroller into entering the Power Down
Mode, the processor will remain in a low-power state un-
til the logic condition of the selected wake-up pin on the
port pin changes from high to low. This function is espe-
cially suitable for applications that can be woken up via
external switches. Each pin on PA, PB, PC, PD and
PE0~PE1 has the capability to wake-up the device on
an external falling edge. Note that some pins can only
be setup nibble wide whereas other can be bit selected
to have a wake-up function.
I/O Port Control Registers
Each I/O port has its own control register PAC, PBC,
PCC, PDC and PEC, to control the input/output configu-
ration. With this control register, each CMOS output or in-
put with or without pull-high resistor structures can be
reconfigured dynamically under software control. Each of
the I/O ports is directly mapped to a bit in its associated
port control register. Note that several pins can be setup
to have NMOS outputs using configuration options.
For the I/O pin to function as an input, the corresponding
bit of the control register must be written as a 1 . This
will then allow the logic state of the input pin to be di-
rectly read by instructions. When the corresponding bit
of the control register is written as a 0 , the I/O pin will
be setup as an output. If the pin is currently setup as an
output, instructions can still be used to read the output
register. However, it should be noted that the program
will in fact only read the status of the output data latch
and not the actual logic status of the output pin.
HT82B40R/HT82B40A
September 4, 2009