OX16PCI954-TQC60-A OXFORD [Oxford Semiconductor], OX16PCI954-TQC60-A Datasheet - Page 61
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OX16PCI954-TQC60-A
Manufacturer Part Number
OX16PCI954-TQC60-A
Description
Integrated Quad UART and PCI interface
Manufacturer
OXFORD [Oxford Semiconductor]
Datasheet
1.OX16PCI954-TQC60-A.pdf
(72 pages)
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13 AC E
13.1 PCI Bus
The timings for PCI pins comply with PCI Specification for the 5.0 Volt signalling environment.
13.2 Local Bus
By default, the Local bus control signals change state in the cycle immediately following the reference cycle, with offsets to
provide setup and hold times for common peripherals in Intel mode. The tables below show these default values; however each
of these can be increased or decreased by an number of PCI clock cycles by adjusting the parameters in registers LT1 and LT2.
Data Sheet Revision 1.3
OXFORD SEMICONDUCTOR LTD.
Symbol
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
zwcs1
zwcs2
t
t
t
t
t
t
zrcs1
zrcs2
t
t
t
t
t
t
t
t
cswr
wrcs
zwr1
zwr2
csrd
rdcs
zrd1
zrd2
wrdi
zd1
zd2
awr
zdv
ard
drd
zdf
ref
za
sd
hd
ref
za
LECTRICAL
Parameter
IRDY# falling to reference LBCLK
Reference LBCLK to Address Valid
Address Valid to LBRD# falling
Reference LBCLK to LBCS# falling
Reference LBCLK to LBCS# rising
LBCS# falling to LBRD# falling
LBRD# rising to LBCS# rising
Reference LBCLK to LBRD# falling
Reference LBCLK to LBRD# rising
Data bus floating to LBRD# falling
Reference LBCLK to data bus floating at the start of the read
transaction
Reference LBCLK to data bus driven by OX16PCI954 at the end of the
read transaction
Data bus valid to LBRD# rising
Data bus valid after LBRD# rising
Parameter
IRDY# falling to reference LBCLK
Reference LBCLK to Address Valid
Address Valid to LBWR# falling
Reference LBCLK to LBCS# falling
Reference LBCLK to LBCS# rising
LBCS# falling to LBWR# falling
LBWR# rising to LBCS# rising
Reference LBCLK to LBWR# falling
Reference LBCLK to LBWR# rising
Reference LBCLK to data bus valid
Reference LBCLK to data bus high-impedance
LBWR# rising to data bus invalid
C
HARACTERISTICS
Table 42: Read operation from Intel-type Local Bus
Table 43: Write operation to Intel-type Local Bus
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Min
Nominally 2 PCI clock cycles
Min
Nominally 2 PCI clock cycles
Max
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Max
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
OX16PCI954
Units
Units
Page 61
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns