A3P060-1VQ144T ACTEL [Actel Corporation], A3P060-1VQ144T Datasheet - Page 82
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A3P060-1VQ144T
Manufacturer Part Number
A3P060-1VQ144T
Description
Automotive ProASIC3 Flash Family FPGAs
Manufacturer
ACTEL [Actel Corporation]
Datasheet
1.A3P060-1VQ144T.pdf
(136 pages)
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Automotive ProASIC3 DC and Switching Characteristics
Figure 2-27 • Timing Model and Waveforms
Table 2-106 • Register Delays
2 -7 0
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Note:
CLK
Data
EN
Out
PRE
CLR
CLKQ
SUD
HD
SUE
HE
CLR2Q
PRE2Q
REMCLR
RECCLR
REMPRE
RECPRE
WCLR
WPRE
CKMPWH
CKMPWL
For specific junction temperature and voltage supply levels, refer to
values.
Timing Characteristics
Automotive-Case Conditions: T
Clock-to-Q of the Core Register
Data Setup Time for the Core Register
Data Hold Time for the Core Register
Enable Setup Time for the Core Register
Enable Hold Time for the Core Register
Asynchronous Clear-to-Q of the Core Register
Asynchronous Preset-to-Q of the Core Register
Asynchronous Clear Removal Time for the Core Register
Asynchronous Clear Recovery Time for the Core Register
Asynchronous Preset Removal Time for the Core Register
Asynchronous Preset Recovery Time for the Core Register
Asynchronous Clear Minimum Pulse Width for the Core Register
Asynchronous Preset Minimum Pulse Width for the Core Register
Clock Minimum Pulse Width HIGH for the Core Register
Clock Minimum Pulse Width LOW for the Core Register
50%
50%
t
SUE
t
HE
50%
t
CLKQ
50%
t
SUD
0
t
HD
t
50%
PRE2Q
50%
50%
J
t
= 135°C, Worst-Case V
Description
WPRE
50%
50%
50%
v1.0
t
t
RECPRE
WCLR
50%
t
50%
50%
CLR2Q
50%
CC
t
RECCLR
= 1.425 V
Table 2-5 on page 2-5
50%
t
CKMPWH
t
50%
REMPRE
0.67
0.52
0.00
0.55
0.00
0.49
0.49
0.00
0.27
0.00
0.27
0.25
0.25
0.41
0.37
t
–1
50%
CKMPWL
0.61
0.57
0.00
0.32
0.30
Std.
0.79
0.00
0.65
0.00
0.57
0.00
0.32
0.30
0.48
0.43
for derating
50%
50%
t
REMCLR
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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