WM9715LGEFLV WOLFSON [Wolfson Microelectronics plc], WM9715LGEFLV Datasheet - Page 61
![no-image](/images/no-image-200.jpg)
WM9715LGEFLV
Manufacturer Part Number
WM9715LGEFLV
Description
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
1.WM9715LGEFLV.pdf
(77 pages)
- Current page: 61 of 77
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Production Data
w
COLD RESET (ASYNCHRONOUS, RESETS REGISTER SETTINGS)
Figure 21 Cold Reset Timing
Note:
For correct operation SDATAOUT and SYNC must be held LOW for entire RESETB active
low period otherwise the device may enter test mode. See AC’97 specification or Wolfson
applications note WAN104 for more details.
WARM RESET (ASYNCHRONOUS, PRESERVES REGISTER SETTINGS)
Figure 22 Warm Reset Timing
RESETB active low pulse width
RESETB inactive to BITCLK startup
delay
SYNC active high pulse width
SYNC inactive to BITCLK startup
delay
RESETB
BITCLK
PARAMETER
PARAMETER
t
RST_LOW
t
SYMBOL
SYMBOL
SYNC_HIGH
t
t
t
RST_LOW
RST2CLK
RST2CLK
t
RST2CLK
162.8
162.4
MIN
MIN
1.0
PD Rev 4.0 December 2007
TYP
TYP
1.3
MAX
MAX
WM9715L
UNIT
UNIT
µs
ns
µs
ns
61
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