WM9712CLGEFL/RV WOLFSON [Wolfson Microelectronics plc], WM9712CLGEFL/RV Datasheet - Page 57

• Manufacturer Part Number: WM9712CLGEFL/RV
• Manufacturer: WOLFSON [Wolfson Microelectronics plc]

Production Data
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LOW POWER STANDBY MODE
If all the bits in registers 26h and 24h are set, then the WM9712L is in low-power standby mode and
consumes very little current. A 1M resistor string remains connected across AVDD to generate
VREF. This is necessary if the on-chip analogue comparators are used (see “Battery Alarm and
Battery Measurement” section), and helps shorten the delay between wake-up and playback
readiness. If VREF is not required, the 1M resistor string can be disabled by setting the SVD bit,
reducing current consumption further.
Table 43 Disabling VREF (for lowest possible power consumption)
SAVING POWER AT LOW SUPPLY VOLTAGES
The analogue supplies to the WM9712L can run from 1.8V to 3.6V. By default, all analogue circuitry
on the IC is optimized to run at 3.3V. This set-up is also good for all other supply voltages down to
1.8V. However, at lower voltages, it is possible to save power by reducing the internal bias currents
used in the analogue circuitry. This is controlled as shown below.
Table 44 Analogue Bias Selection
REGISTER
ADDRESS
58h
REGISTER
ADDRESS
5Ch
BIT
10
BIT
6:5
LABEL
SVD
LABEL
VBIAS
DEFAULT
0
DEFAULT
00
DESCRIPTION
VREF Disable
0: VREF enabled using 1M string (low-power
standby mode)
1 : VREF disabled, 1M string disconnected
(OFF mode)
DESCRIPTION
Analogue Bias optimization
11 : Lowest bias current, optimized for 1.8V
10 : Low bias current, optimized for 2.5V
01, 00 : Default bias current, optimized for 3.3V
PD, Rev 4.6, November 2011
WM9712L
57