WM9712CLGEFL/RV WOLFSON [Wolfson Microelectronics plc], WM9712CLGEFL/RV Datasheet - Page 10
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WM9712CLGEFL/RV
Manufacturer Part Number
WM9712CLGEFL/RV
Description
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
1.WM9712CLGEFLRV.pdf
(78 pages)
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WM9712L
w
REFERENCE VOLTAGES
DIGITAL INTERFACE CHARACTERISTICS
Note:
1.
2.
Test Conditions
DBVDD=3.3V, DCVDD = 3.3V, AVDD = 3.3V, T
PARAMETER
Audio ADCs, DACs, Mixers
Reference Input/Output
Buffered Reference Output
Microphone Bias
Bias Voltage
Bias Current Source
Output Noise Voltage
Test Conditions
DBVDD = 3.3V, DCVDD = 3.3V, T
PARAMETER
Digital Logic Levels (all digital input or output pins) – CMOS Levels
Input HIGH level
Input LOW level
Output HIGH level
Output LOW level
Clock Frequency
Master clock (XTLIN pin)
AC’97 bit clock (BIT_CLK pin)
AC’97 sync pulse (SYNC pin)
All audio and non-audio sample rates and other timing scales proportionately with the master clock.
For signal timing on the AC-Link, please refer to the AC’97 specification (Revision 2.2)
A
SYMBOL
CAP2 pin
VREF pin
SYMBOL
= +25
V
I
MICBIAS
MICBIAS
V
V
V
Vn
V
OH
OL
IH
IL
o
C, unless otherwise stated.
A
= +25
TEST CONDITIONS
TEST CONDITIONS
source current = 2mA
sink current = 2mA
1K to 20kHz
o
C, 1kHz signal, fs = 48kHz, 18-bit audio data unless otherwise stated.
DBVDD0.9
MIN
MIN
DBVDD0.7
2.88
1.6
1.6
TYP
TYP
24.576
12.288
1.65
1.65
2.97
15
48
PD, Rev 4.6, November 2011
DBVDD0.3
DBVDD0.1
MAX
MAX
3.06
1.7
1.7
3
Production Data
UNIT
UNIT
nV/Hz
MHz
MHz
kHz
mA
V
V
V
V
V
10
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