XR16M2752IJ44 EXAR [Exar Corporation], XR16M2752IJ44 Datasheet - Page 23

• Manufacturer Part Number: XR16M2752IJ44
• Description: HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
• Manufacturer: EXAR [Exar Corporation]

REV. P1.0.0
SEE”RECEIVER” ON PAGE 13.
SEE”TRANSMITTER” ON PAGE 12.
The Interrupt Enable Register (IER) masks the interrupts from receive data ready, transmit empty, line status
and modem status registers. These interrupts are reported in the Interrupt Status Register (ISR).
4.0 INTERNAL REGISTER DESCRIPTIONS
4.1
4.2
4.3
A
A2-A0
DDRESS
0 1 0
0 0 0
0 0 0
0 0 1
0 0 0
0 0 1
0 1 0
0 0 0
0 0 1
0 1 0
1 0 0
1 0 1
1 1 0
1 1 1
T
Receive Holding Register (RHR) - Read- Only
Transmit Holding Register (THR) - Write-Only
Interrupt Enable Register (IER) - Read/Write
ABLE
XOFF1 RD/WR
XOFF2 RD/WR
DREV
FCTR RD/WR
XON1 RD/WR
XON2 RD/WR
N
DVID
DLM
TRG
AFR
DLD
EFR
R
DLL
FC
AME
EG
8: INTERNAL REGISTERS DESCRIPTION.
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
W
R
WR
RD
RD
RD
EAD
RITE
/
Enable
RX/TX
Mode
B
Rsvd
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Auto
CTS
Bit-7
Bit-7
Bit-7
Bit-7
IT
0
0
-7
SCPAD
Enable
Swap
B
Rsvd
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Auto
Bit-6
Bit-6
Bit-6
Bit-6
RTS
IT
0
0
-6
Baud Rate Generator Divisor
Enhanced Registers
Special
Select
Table
B
Rsvd
Char
Bit-5
Bit-5
Bit-5
Bit-5
Bit-5
Bit-1
Bit-5
Bit-5
Bit-5
Bit-5
Trig
IT
0
0
-5
23
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
MCR[7:5],
IER [7:4],
ISR [5:4],
FCR[5:4],
Enable
B
Table
Rsvd
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-0
Bit-4
Bit-4
Bit-4
Bit-4
DLD
Trig
IT
0
0
-4
S
HADED BITS ARE ENABLED WHEN
Direction
Control
RS485
B
Rsvd
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Auto
Soft-
ware
Flow
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Cntl
IT
1
-3
RXRDY#
RX IR
B
Select
Input
ware
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Soft-
Flow
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Cntl
Inv.
IT
0
-2
Baudout#
B
Select
ware
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Auto
Bit-1
Soft-
Flow
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
RTS
Hyst
Cntl
IT
1
-1
rent Write
EFR B
Concur-
B
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Auto
Bit-0
Soft-
ware
Flow
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
RTS
Hyst
Cntl
XR16M2752
IT
0
-0
IT
-4=1
LCR ≠ 0xBF
LCR ≠ 0xBF
LCR ≠ 0xBF
LCR ≠ 0xBF
LCR=0
EFR[4] = 0
EFR[4] = 1
DLM=0x00
DLL=0x00
C
LCR[7]=1
LCR[7]=1
LCR[7]=1
LCR[7]=1
OMMENT
X
BF