XR16M2752IJ44 EXAR [Exar Corporation], XR16M2752IJ44 Datasheet - Page 21

• Manufacturer Part Number: XR16M2752IJ44
• Description: HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
• Manufacturer: EXAR [Exar Corporation]

REV. P1.0.0
Each of the UART channel in the M2752 has its own set of configuration registers selected by address lines
A0, A1 and A2 with CS# or CHSEL selecting the channel. The complete register set is shown on
Table
3.0 UART INTERNAL REGISTERS
8.
A
A2 A1 A0
DDRESSES
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
1
1
1
1
0
0 0
0 1
1 0
1 0
0 0
0 1
0 1
1 0
1 1
0 0
0 1
1 0
1 1
1 1
1 1
0 0
0 1
1 0
0 0
0 1
1 0
1 1
0 0
T
ABLE
RHR - Receive Holding Register
THR - Transmit Holding Register
DLL - Divisor LSB
DLM - Divisor MSB
AFR - Alternate Function Register
DLD - Divisor Fractional
DREV - Device Revision Code
DVID - Device Identification Code
IER - Interrupt Enable Register
ISR - Interrupt Status Register
FCR - FIFO Control Register
LCR - Line Control Register
MCR - Modem Control Register
LSR - Line Status Register
MSR - Modem Status Register
SPR - Scratch Pad Register
FLVL - RX/TX FIFO Level Counter Register
EMSR - Enhanced Mode Select Register
TRG - RX/TX FIFO Trigger Level Register
FC - RX/TX FIFO Level Counter Register
FCTR - Feature Control Register
EFR - Enhanced Function Register
Xon-1 - Xon Character 1
Xon-2 - Xon Character 2
Xoff-1 - Xoff Character 1
Xoff-2 - Xoff Character 2
7: UART CHANNEL A AND B UART INTERNAL REGISTERS
16C550 C
R
EGISTER
E
NHANCED
OMPATIBLE
21
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
R
EGISTERS
R
EGISTERS
R
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Write-only
Write-only
Write-only
Write-only
EAD
/W
RITE
LCR ≠ 0xBF, FCTR[6] = 0
LCR ≠ 0xBF, FCTR[6] = 1
LCR[7] = 1, LCR ≠ 0xBF,
LCR[7] = 1, LCR ≠ 0xBF,
LCR[7] = 1, LCR ≠ 0xBF
LCR[7] = 1, LCR ≠ 0xBF
DLL, DLM = 0x00,
LCR = 0xBF
LCR ≠ 0xBF
LCR ≠ 0xBF
C
LCR[7] = 0
EFR[4] = 0
EFR[4] = 1
LCR[7] = 0
XR16M2752
OMMENTS
Table 7
and