AK4343EN AKM [Asahi Kasei Microsystems], AK4343EN Datasheet - Page 86

• Manufacturer Part Number: AK4343EN
• Description: Stereo DAC with HP/RCV/SPK-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
3. PLL Slave Mode (MCKI pin)
MS0478-E-01
Power Supply
PMVCM bit
(Addr:00H, D6)
(Addr:01H, D1)
(Addr:01H, D0)
PMPLL bit
MCKO pin
MCKO bit
<Example>
LRCK pin
MCKI pin
BICK pin
PDN pin
(1) After Power Up: PDN pin “L”
(2) DIF1-0, PLL3-0 and FS3-0 bits should be set during this period.
(3) Power Up VCOM: PMVCM bit = “0”
(4) Enable MCKO output: MCKO bit = “1”
(5) PLL starts after that the PMPLL bit changes from “0” to “1” and PLL reference clock (MCKI pin) is supplied.
(6) The normal clock is output from MCKO after PLL is locked.
(7) The invalid frequency is output from MCKO during this period.
(8) BICK and LRCK clocks should be synchronized with MCKO clock.
“L” time of 150ns or more is needed to reset the AK4343.
VCOM should first be powered up before the other block operates.
PLL lock time is 40ms(max).
(1)
(2)
(3)
(4)
(5)
40msec(max)
Figure 76. Clock Set Up Sequence (3)
“H”
(7)
Input
“1”
(6)
(8)
- 86 -
Output
Input
Example:
(1) Power Supply & PDN pin = “L”
Input Master Clock Select at PLL Mode: 11.2896MHz
Audio I/F Format: MSB justified
MCKO: Enable
Sampling Frequency: 44.1kHz
BICK and LRCK input start
(2)Addr:04H, Data:4AH
(4)Addr:01H, Data:03H
(3)Addr:00H, Data:40H
MCKO output start
Addr:05H, Data:27H
[AK4343]
“H”
2006/10