AK4343EN AKM [Asahi Kasei Microsystems], AK4343EN Datasheet - Page 5

• Manufacturer Part Number: AK4343EN
• Description: Stereo DAC with HP/RCV/SPK-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
Note 1. All input pins except analog input pins (MIN/LIN3, LIN1, RIN1, LIN2, RIN2, RIN3) should not be left floating.
Note 2. AVDD or AVSS voltage should be input to I2C pin.
MS0478-E-01
No. Pin Name
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
9
TEST1
VCOM
AVSS
AVDD
VCOC
RIN3
I2C
PDN
CSN
CAD0
CCLK
SCL
CDTI
SDA
SDTI
TEST2
LRCK
BICK
DVDD
DVSS
MCKI
MCKO
SPN
SPP
HVDD
HVSS
HPR
HPL
MUTET
ROUT
RCN
LOUT
RCP
MIN
LIN3
RIN2
IN2−
LIN2
IN2+
LIN1
IN1−
RIN1
IN1+
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
-
-
-
I
I
I
I
I
I
I
I
I
-
-
-
I
-
-
I
I
I
I
I
I
I
I
I
I
Test 1 Pin
Common Voltage Output Pin, 0.45 x AVDD
Analog Ground Pin
Analog Power Supply Pin
Output Pin for Loop Filter of PLL Circuit (AIN3 bit = “0”: PLL is available)
Rch Analog Input 3 Pin (AIN3 bit = “1”: PLL is not available)
Control Mode Select Pin
Power-Down Mode Pin
Chip Select Pin (I2C pin = “L”: 3-wire Serial Mode)
Chip Address 1 Select Pin (I2C pin = “H”: I
Control Data Clock Pin (I2C pin = “L”: 3-wire Serial Mode)
Control Data Clock Pin (I2C pin = “H”: I
Control Data Input Pin (I2C pin = “L”: 3-wire Serial Mode)
Control Data Input Pin (I2C pin = “H”: I
Audio Serial Data Input Pin
Test 2 Pin
Input / Output Channel Clock Pin
Audio Serial Data Clock Pin
Digital Power Supply Pin
Digital Ground Pin
External Master Clock Input Pin
Master Clock Output Pin
Speaker Amp Negative Output Pin
Speaker Amp Positive Output Pin
Headphone & Speaker Amp Power Supply Pin
Headphone & Speaker Amp Ground Pin
Rch Headphone-Amp Output Pin
Lch Headphone-Amp Output Pin
Mute Time Constant Control Pin
Rch Stereo Line Output Pin (RCV bit = “0”: Single-ended Stereo Output)
Receiver-Amp Negative Output Pin (RCV bit = “1”: BTL output)
Lch Stereo Line Output Pin (RCV bit = “0”: Single-ended Stereo Output)
Receiver-Amp Positive Output Pin (RCV bit = “1”: BTL output)
Mono Signal Input Pin (AIN3 bit = “0”: PLL is available)
Lch Analog Input 3 Pin (AIN3 bit = “1”: PLL is not available)
Rch Analog Input 2 Pin (MDIF2 bit = “0”: Single-ended Input)
Rch Negative Input 2 Pin (MDIF2 bit = “1”: Full-differential Input)
Lch Analog Input 2 Pin (MDIF2 bit = “0”: Single-ended Input)
Rch Positive Input 2 Pin (MDIF2 bit = “1”: Full-differential Input)
Lch Analog Input 1 Pin (MDIF1 bit = “0”: Single-ended Input)
Lch Negative Input 1 Pin (MDIF1 bit = “1”: Full-differential Input)
Rch Analog Input 1 Pin (MDIF1 bit = “0”: Single-ended Input)
Lch Positive Input 1 Pin (MDIF1 bit = “1”: Full-differential Input)
Connected to HVSS pin with a capacitor for mute time constant.
This pin should be left floating.
Bias voltage of DAC outputs.
This pin should be connected to AVSS with one resistor and capacitor in series.
“H”: I
“H”: Power-up, “L”: Power-down, reset and initializes the control register.
This pin should be left floating.
2
C Bus, “L”: 3-wire Serial
PIN/FUNCTION
- 5 -
Function
2
2
C Bus Mode)
C Bus Mode)
2
C Bus Mode)
[AK4343]
2006/10