M38062M3-156FP MITSUBISHI [Mitsubishi Electric Semiconductor], M38062M3-156FP Datasheet - Page 32

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M38062M3-156FP

Manufacturer Part Number
M38062M3-156FP
Description
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
NOTES ON PROGRAMMING
Processor Status Register
The contents of the processor status register (PS) after a reset are
undefined, except for the interrupt disable flag (I) which is “1”. Af-
ter a reset, initialize flags which affect program execution.
In particular, it is essential to initialize the index X mode (T) and
the decimal mode (D) flags because of their effect on calculations.
Interrupts
The contents of the interrupt request bits do not change immedi-
ately after they have been written. After writing to an interrupt re-
quest register, execute at least one instruction before executing a
BBC or BBS instruction.
Decimal Calculations
To calculate in decimal notation, set the decimal mode flag (D) to
“1”, then execute an ADC or SBC instruction. Only the ADC and
SBC instructions yield proper decimal results. After executing an
ADC or SBC instruction, execute at least one instruction before
executing a SEC, CLC, or CLD instruction.
In decimal mode, the values of the negative (N), overflow (V), and
zero (Z) flags are invalid.
The carry flag can be used to indicate whether a carry or borrow
has occurred. Initialize the carry flag before each calculation.
Clear the carry flag before an ADC and set the flag before an
SBC.
Timers
If a value n (between 0 and 255) is written to a timer latch, the fre-
quency division ratio is 1/(n + 1).
Multiplication and Division Instructions
The index X mode (T) and the decimal mode (D) flags do not af-
fect the MUL and DIV instruction.
The execution of these instructions does not change the contents
of the processor status register.
Ports
The contents of the port direction registers cannot be read.
The following cannot be used:
• The data transfer instruction (LDA, etc.)
• The operation instruction when the index X mode flag (T) is “1”
• The addressing mode which uses the value of a direction regis-
• The bit-test instruction (BBC or BBS, etc.) to a direction register
• The read-modify-write instruction (ROR, CLB, or SEB, etc.) to a
Use instructions such as LDM and STA, etc., to set the port direc-
tion registers.
32
ter as an index
direction register
Serial I/O
In clock synchronous serial I/O, if the receive side is using an ex-
ternal clock and it is to output the S
enable bit, the receive enable bit, and the S
to “1”.
Serial I/O1 continues to output the final bit from the T
transmission is completed. The S
high impedance after transmission is completed.
A-D Converter
The comparator uses internal capacitors whose charge will be lost
if the clock frequency is too low.
Make sure that f(X
sion. (If the ONW pin has been set to “L”, the A-D conversion will
take twice as long to match the longer bus cycle, and so f(X
must be at least 1 MHz.)
Do not execute the STP or WIT instruction during an A-D conver-
sion.
D-A Converter
The accuracy of the D-A converter becomes poor rapidly under
the V
Instruction Execution Time
The instruction execution time is obtained by multiplying the fre-
quency of the internal clock
execute an instruction.
The number of cycles required to execute an instruction is shown
in the list of machine instructions.
The frequency of the internal clock
When the ONW function is used in modes other than single-chip
mode, the frequency of the internal clock
X
Memory Expansion Mode and Microproces-
sor Mode
Execute the LDM or STA instruction for writing to port P3 (address
0006
Set areas which can be read out and write to port P3 (address
0006
(SEB, CLB).
IN
frequency.
16
CC
16
) in memory expansion mode and microprocessor mode.
) in a memory, using the read-modify-write instruction
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
= 4.0 V or less condition.
_____
____
IN
MITSUBISHI MICROCOMPUTERS
) is at least 500 kHz during an A-D conver-
by the number of cycles needed to
OUT2
_____
RDY1
is half of the X
pin from serial I/O2 goes to
3806 Group
_____
signal, set the transmit
RDY1
may be one fourth the
output enable bit
IN
frequency.
X
D pin after
IN
)

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