M38062M3-156FP MITSUBISHI [Mitsubishi Electric Semiconductor], M38062M3-156FP Datasheet - Page 17

• Manufacturer Part Number: M38062M3-156FP
• Description: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

Timers
The 3806 group has four timers: timer X, timer Y, timer 1, and
timer 2.
All timers are count down. When the timer reaches “00
derflow occurs at the next count pulse and the corresponding
timer latch is reloaded into the timer and the count is continued.
When a timer underflows, the interrupt request bit corresponding
to that timer is set to “1”.
The division ratio of each timer or prescaler is given by 1/(n + 1),
where n is the value in the corresponding timer or prescaler latch.
Fig. 8 Structure of timer XY register
b7
b0
b1b0
b5b4
Timer XY mode register
(TM : address 0023
Timer X operating mode bit
Timer Y operating mode bit
0 0: Timer mode
0 1: Pulse output mode
1 0: Event counter mode
1 1: Pulse width measurement mode
CNTR
Timer X count stop bit
0 0: Timer mode
0 1: Pulse output mode
1 0: Event counter mode
1 1: Pulse width measurement mode
CNTR
Timer Y count stop bit
1: Interrupt at rising edge
0: Interrupt at falling edge
1: Interrupt at rising edge
0: Count start
1: Count stop
0: Interrupt at falling edge
0: Count start
1: Count stop
Count at rising edge in event
Count at falling edge in event
Count at rising edge in event
Count at falling edge in event
counter mode
counter mode
counter mode
counter mode
0
1
active edge switch bit
active edge switch bit
16)
16
”, an un-
Timer 1 and Timer 2
The count source of prescaler 12 is the oscillation frequency di-
vided by 16. The output of prescaler 12 is counted by timer 1 and
timer 2, and a timer underflow sets the interrupt request bit.
Timer X and Timer Y
Timer X and Timer Y can each be selected in one of four operating
modes by setting the timer XY mode register.
Timer Mode
The timer counts f(X
Pulse Output Mode
Timer X (or timer Y) counts f(X
the timer reach “00
CNTR
switch bit is “0”, output begins at “ H”.
If it is “1”, output starts at “L”. When using a timer in this mode, set
the corresponding port P5
put mode.
Event Counter Mode
Operation in event counter mode is the same as in timer mode,
except the timer counts signals input through the CNTR
CNTR
Pulse Width Measurement Mode
If the CNTR
counts at the oscillation frequency divided by 16 while the CNTR
(or CNTR
switch bit is “1”, the count continues during the time that the
CNTR
In all of these modes, the count can be stopped by setting the
timer X (timer Y) count stop bit to “1”. Ever y time a timer
underflows, the corresponding interrupt request bit is set.
1
0
1
) pin is inverted. If the CNTR
(or CNTR
pin.
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
1
) pin is at “H”. If the CNTR
0
(or CNTR
1
) pin is at “L”.
IN
16
)/16 in timer mode.
”, the signal output from the CNTR
1
) active edge selection bit is “0”, the timer
4
( or port P5
IN
)/16. Whenever the contents of
0
0
5
3806 Group
) direction register to out-
(or CNTR
(or CNTR
1
1
) active edge
) active edge
0
0
17
(or
or
0