LF3310QC15 LODEV [LOGIC Devices Incorporated], LF3310QC15 Datasheet - Page 5

• Manufacturer Part Number: LF3310QC15
• Description: Horizontal / Vertical Digital Image Filter
• Manufacturer: LODEV [LOGIC Devices Incorporated]

DEVICES INCORPORATED
HRSL
HRSL
sixteen user-programmable Round/
Select/Limit registers (RSL registers)
are used in the horizontal Round/
Select/Limit circuitry (RSL circuitry).
A value of 0 on HRSL
RSL register 0. A value of 1 selects
round/select/limit register 1 and so
on. HRSL
edge of CLK (see the horizontal
round, select, and limit sections for a
complete discussion).
VRSL
Control
VRSL
sixteen user-programmable
RSL registers are used in the vertical
RSL circuitry. A value of 0 on
VRSL
value of 1 selects RSL register 1 and
so on. VRSL
edge of CLK (see the vertical round,
select, and limit sections for a com-
plete discussion).
OE — Output Enable
When OE is LOW, DOUT
enabled for output. When OE is
HIGH, DOUT
high-impedance state.
HPAUSE — LF Interface
When HPAUSE is HIGH, the Hori-
zontal LF Interface
sequence is halted until HPAUSE is
returned to a LOW state. This
effectively allows the user to load
coefficients and Control Registers at a
slower rate than the master clock (see
the LF Interface
discussion).
VPAUSE — LF Interface
When VPAUSE is HIGH, the Vertical
LF Interface
halted until VPAUSE is returned to a
LOW state. This effectively allows the
user to load coefficients and Control
3-0
3-0
3-0
3-0
3-0
—Vertical Round/Select/Limit
determines which of the
selects RSL register 0. A
— Horizontal Round/Select/
determines which of the
3-0
Limit Control
TM
3-0
is latched on the rising
11-0
loading sequence is
is latched on the rising
TM
is placed in a
section for a full
TM
3-0
loading
TM
TM
selects
11-0
Pause
Pause
is
Registers at a slower rate than the
master clock (see the LF Interface
section for a full discussion).
OPERATIONAL MODES
Dimensionally Separate
In Dimensionally Separate Mode, the
horizontal and vertical filters are
cascaded together to form a
two-dimensional image filter (see
Figures 4 and 5). Bit 1 in Configura-
tion Register 4 determines the cascade
order. If this bit is set to “0”, data on
F
F
IGURE
IGURE
DIN
11-0
4. D
5. D
12
DIN
11-0
IMENSIONALLY
IMENSIONALLY
5
LINE BUFFER
LINE BUFFER
LINE BUFFER
LINE BUFFER
LINE BUFFER
LINE BUFFER
LINE BUFFER
Horizontal / Vertical Digital Image Filter
12
LINE BUFFER
LINE BUFFER
LINE BUFFER
LINE BUFFER
LINE BUFFER
LINE BUFFER
LINE BUFFER
S
S
TM
EPARATE
EPARATE
12
12
HORIZONTAL FILTER
DIN
first. The horizontal filter then feeds
data into the vertical filter. If this bit
is set to “1”, data on DIN
into the vertical filter first. The
vertical filter then feeds data into the
horizontal filter.
Orthogonal
In Orthogonal Mode, the horizontal
and vertical filters are used concur-
rently to implement an orthogonal
kernel on the input data (see Figure 6).
Video Imaging Products
M
M
11-0
ODE
ODE
is fed into the horizontal filter
: H
: V
12
HORIZONTAL FILTER
TO
TO
DOUT
H
V
12
11-0
DOUT
11/08/2001-LDS.3310-H
11-0
11-0
LF3310
is fed