LF3310QC15 LODEV [LOGIC Devices Incorporated], LF3310QC15 Datasheet - Page 11

• Manufacturer Part Number: LF3310QC15
• Description: Horizontal / Vertical Digital Image Filter
• Manufacturer: LODEV [LOGIC Devices Incorporated]

DEVICES INCORPORATED
Vertical Rounding
The vertical filter output may be
rounded by adding the contents of
one of the sixteen vertical round
registers to the vertical filter output
(see Figure 11). Each round register is
32-bits wide and user-programmable.
This allows the filter’s output to be
rounded to any precision required.
Since any 32-bit value may be
programmed into the round registers,
the device can support complex
rounding algorithms as well as
standard Half-LSB rounding.
VRSL
sixteen vertical round registers are
used in the rounding operation. A
value of 0 on VRSL
round register 0. A value of 1 selects
vertical round register 1 and so on.
VRSL
cycle if desired. This allows the
rounding algorithm to be changed
every clock cycle. This is useful when
filtering interleaved data. If rounding
is not desired, a round register should
be loaded with 0 and selected as the
register used for rounding. Round
register loading is discussed in the LF
Interface
Vertical Select
The word width of the vertical filter
output is 32-bits. However, only
12-bits may be sent to the filter
output. The vertical filter select
circuitry determines which 12-bits are
passed (see Table 1). The vertical
select registers control the vertical
select circuitry. There are sixteen
vertical select registers. Each select
11 10 9 DESCRIPTION
0 0 0 Coefficient Banks
0 0 1 Configuration Registers
0 1 0 Horizontal Select Registers
0 1 1 Vertical Select Registers
1 0 0 Horizontal Round Registers
1 0 1 Vertical Round Registers
1 1 0 Horizontal Limit Registers
1 1 1 Vertical Limit Registers
T
ABLE
3-0
3-0
8. HCF/VCF
determines which of the
may be changed every clock
TM
section.
3-0
selects vertical
11-9
D
ECODE
register is 5-bits wide and
user-programmable. VRSL
mines which of the sixteen vertical
select registers are used in the vertical
select circuitry. A value of 0 on
VRSL
0. A value of 1 selects vertical select
register 1 and so on. VRSL
changed every clock cycle if desired.
This allows the 12-bit window to be
changed every clock cycle. This is
useful when filtering interleaved
data. Select register loading is
discussed in the LF Interface
section.
Vertical Limiting
An output limiting function is pro-
vided for the output of the vertical
filter. The vertical limit registers
determine the valid range of output
values when limiting is enabled (Bit 0
in Configuration Register 5). There
T
T
T
REGISTER
REGISTER
REGISTER
ABLE
ABLE
ABLE
14
15
14
15
14
15
3-0
0
1
0
1
0
1
10. H
9. H
11. H
selects vertical select register
RZ
RZ
RZ
. R
. S
. L
ADDRESS (HEX)
ADDRESS (HEX)
ADDRESS (HEX)
11
OUND
ELECT
IMIT
Horizontal / Vertical Digital Image Filter
C0E
C0F
80E
40E
C00
C01
800
801
80F
400
401
40F
R
R
R
EGISTERS
3-0
EGISTERS
3-0
EGISTERS
TM
may be
deter-
are sixteen 24-bit vertical limit
registers. VRSL
vertical limit register is used during
the limit operation. A value of 0 on
VRSL
0. A value of 1 selects vertical limit
register 1 and so on. Each limit
register contains both an upper and
lower limit value. If the value fed to
the limiting circuitry is less than the
lower limit, the lower limit value is
passed as the filter output. If the
value fed to the limiting circuitry is
greater than the upper limit, the upper
limit value is passed as the filter output.
VRSL
cycle if desired. This allows the limit
range to be changed every clock cycle.
This is useful when filtering interleaved
data. When loading limit values into
the device, the upper limit must be
greater than the lower limit. Limit
register loading is discussed in the LF
Interface
T
T
T
REGISTER
REGISTER
REGISTER
ABLE
ABLE
ABLE
Video Imaging Products
14
15
14
15
14
15
3-0
3-0
0
1
0
1
0
1
12. V
13. V
14. V
may be changed every clock
TM
selects vertical limit register
section.
RT
RT
RT
3-0
. R
. S
. L
ADDRESS (HEX)
ADDRESS (HEX)
ADDRESS (HEX)
determines which
ELECT
OUND
IMIT
A0E
A0F
E0E
E0F
A00
A01
60E
60F
E00
E01
600
601
11/08/2001-LDS.3310-H
R
R
R
EGISTERS
EGISTERS
LF3310
EGISTERS