SAH-C515 SIEMENS [Siemens Semiconductor Group], SAH-C515 Datasheet - Page 129

• Manufacturer Part Number: SAH-C515
• Description: 8-Bit CMOS Microcontroller
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

8
8.1
8.1.1 General Operation
As a means of graceful recovery from software or hardware upset a watchdog timer is provided in
the C515. lf the software fails to clear the watchdog timer at least every 65532 ms (at 12 MHz clock
rate), an internal hardware reset will be initiated. The software can be designed such that the
watchdog times out if the program does not progress properly. The watchdog will also time out if the
software error was due to hardware-related problems. This prevents the controller from
malfunctioning for longer than 65 ms if a 12-MHz oscillator is used.
The watchdog timer is a 16-bit counter which is incremented once every machine cycle. After an
external reset the watchdog timer is disabled and cleared to 0000 H .
8.1.2 Starting the Watchdog Timer
There are two ways to start the watchdog timer depending on the level applied to pin PE/SWD. This
pin serves two functions, because it is also used for blocking the power saving modes. (see also
chapter 9).
8.1.2.1
The automatic start of the watchdog timer directly during an external HW reset is achieved by
strapping pin PE/SWD to
and slow down mode) are also disabled and cannot be started by software. If pin PE/SWD is left
unconnected, a weak pull-up transistor ensures the automatic start of the watchdog timer.
The self-start of the watchdog timer by a pin option has been implemented to provide high system
security in electrically very noisy environments.
Note: The automatic start of the watchdog timer is only performed if PE /SWD (power-save
8.1.2.2
The watchdog timer can also be started by software. Setting of bit SWDT in SFR IEN1 starts the
watchdog timer. After having been started, the bit WDTS in SFR IP0 is set. Note that the watchdog
timer cannot be stopped by software.
See chapter 9 for entering the power saving modes by software.
Semiconductor Group
enable /start watchdog timer) is held at high level while RESET is active. A positive transition
at PE/SWD pin during normal program execution will not start the watchdog timer.
Fail Safe Mechanisms
Watchdog Timer
The First Possibility of Starting the Watchdog Timer
The Second Possibility of Starting the Watchdog Timer
V
CC
. In this case the power saving modes (power down mode, idle mode
8-1
Fail Safe Mechanisms
C515