LM3S2965-IQN25-A0T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IQN25-A0T Datasheet - Page 277

• Manufacturer Part Number: LM3S2965-IQN25-A0T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

ADC Sample Sequence Control 0 (ADCSSCTL0)
Base 0x4003.8000
Offset 0x044
Type R/W, reset 0x0000.0000
June 04, 2007
Reset
Reset
Type
Type
Bit/Field
31
30
29
28
27
26
25
24
23
TS7
R/W
TS3
R/W
31
15
0
0
Register 12: ADC Sample Sequence Control 0 (ADCSSCTL0), offset 0x044
This register contains the configuration information for each sample for a sequence executed with
Sample Sequencer 0. When configuring a sample sequence, the END bit must be set at some point,
whether it be after the first sample, last sample, or any sample in between.
This register is 32-bits wide and contains information for eight possible samples.
R/W
R/W
IE7
IE3
30
14
0
0
Name
END7
END6
TS7
TS6
TS5
END7
END3
IE7
IE6
R/W
R/W
D7
D6
29
13
0
0
R/W
R/W
28
D7
12
D3
0
0
TS6
R/W
TS2
R/W
Type
27
11
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
R/W
R/W
IE6
IE2
26
10
0
0
Reset
0
0
0
0
0
0
0
0
0
END6
END2
R/W
R/W
25
0
9
0
Preliminary
Description
The TS7 bit is used during the eighth sample of the sample sequence
and specifies the input source of the sample. If set, the temperature
sensor is read. Otherwise, the input pin specified by the ADCSSMUX
register is read.
The IE7 bit is used during the eighth sample of the sample sequence
and specifies whether the raw interrupt signal (INR0 bit) is asserted at
the end of the sample's conversion. If the MASK0 bit in the ADCIM
register is set, the interrupt is promoted to a controller-level interrupt.
When this bit is set, the raw interrupt is asserted, otherwise it is not. It
is legal to have multiple samples within a sequence generate interrupts.
The END7 bit indicates that this is the last sample of the sequence. It is
possible to end the sequence on any sample position. Samples defined
after the sample containing a set END are not requested for conversion
even though the fields may be non-zero. It is required that software write
the END bit somewhere within the sequence. (Sample Sequencer 3,
which only has a single sample in the sequence, is hardwired to have
the END0 bit set.)
Setting this bit indicates that this sample is the last in the sequence.
The D7 bit indicates that the analog input is to be differentially sampled.
The corresponding ADCSSMUXx nibble must be set to the pair number
"i", where the paired inputs are "2i and 2i+1". The temperature sensor
does not have a differential option. When set, the analog inputs are
differentially sampled.
Same definition as TS7 but used during the seventh sample.
Same definition as IE7 but used during the seventh sample.
Same definition as END7 but used during the seventh sample.
Same definition as D7 but used during the seventh sample.
Same definition as TS7 but used during the sixth sample.
R/W
R/W
D6
D2
24
0
8
0
R/W
R/W
TS5
TS1
23
0
7
0
R/W
R/W
IE5
IE1
22
0
6
0
END5
END1
R/W
R/W
21
0
5
0
R/W
R/W
D5
D1
20
0
4
0
LM3S2965 Microcontroller
R/W
R/W
TS4
TS0
19
0
3
0
R/W
R/W
IE4
IE0
18
0
2
0
END4
END0
R/W
R/W
17
0
1
0
R/W
R/W
D4
D0
16
0
0
0
277