MC9S12Q32VFA16 FREESCALE [Freescale Semiconductor, Inc], MC9S12Q32VFA16 Datasheet - Page 74
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MC9S12Q32VFA16
Manufacturer Part Number
MC9S12Q32VFA16
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12Q32VFA16.pdf
(644 pages)
- Current page: 74 of 644
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Chapter 2 Port Integration Module (PIM9C32) Block Description
2.1.2
Figure 2-1
Note: The MODRR register within the PIM allows for mapping of PWM channels to Port T in the absence
of Port P pins for the low pin count packages. For the 80QFP package option it is recommended not to use
MODRR since this is intended to support PWM channel availability in low pin count packages. Note that
when mapping PWM channels to Port T in an 80QFP option, the associated PWM channels are then
mapped to both Port P and Port T.
74
PAD0
PAD1
PAD2
PAD3
PAD4
PAD5
PAD6
PAD7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PJ6
PJ7
is a block diagram of the PIM.
Block Diagram
ADDR0/DATA0
ADDR1/DATA1
ADDR2/DATA2
ADDR3/DATA3
ADDR4/DATA4
ADDR5/DATA5
ADDR6/DATA6
ADDR7/DATA7
ADDR8/DATA8
ADDR9/DATA9
ADDR10/DATA10
ADDR11/DATA11
ADDR12/DATA12
ADDR13/DATA13
ADDR14/DATA14
ADDR15/DATA15
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
ATD
Figure 2-1. PIM Block Diagram
Port Integration Module
MC9S12Q128
CORE
Rev 1.10
BKGD/MODC/TAGHI
NOACC/XCLKS
CAN
SPI
LSTRB/TAGLO
IPIPE1/MODB
IPIPE0/MODA
SCI
RXCAN
TXCAN
PWM0
PWM1
PWM2
PWM3
ECLK
MISO
MOSI
XIRQ
IOC2
IOC3
IOC4
IOC5
IOC6
IOC7
RXD
TXD
SCK
R/W
IRQ
SS
MUX
Freescale Semiconductor
PT0
PT1
PT2
PT3
PT4
PT5
PT6
PT7
PP0
PP1
PP2
PP3
PP4
PP5
PP6
PP7
PS0
PS1
PS2
PS3
PM0
PM1
PM2
PM3
PM4
PM5
BKGD
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
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