STM32F101X6_08 STMICROELECTRONICS [STMicroelectronics], STM32F101X6_08 Datasheet - Page 51

• Manufacturer Part Number: STM32F101X6_08
• Description: Access line, advanced ARM-based 32-bit MCU with Flash memory, six 16-bit timers, ADC and seven communication interfaces
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STM32F101xx
5.3.13
Figure 21. I/O AC characteristics definition
NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, R
Unless otherwise specified, the parameters given in
performed under ambient temperature and V
Table
Table 36.
1. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution
2. Values guaranteed by design, not tested in production.
Figure 22. Recommended NRST pin protection
1. The reset network protects the device against parasitic resets.
2. The user must ensure that the level on the NRST pin can go below the V
V
V
V
V
V
Symbol
hys(NRST)
NF(NRST)
IH(NRST)
the series resistance must be minimum
Table
IL(NRST)
F(NRST)
R
PU
7.
36. Otherwise the reset will not be taken into account by the device.
PU
External
reset circuit
NRST pin characteristics
NRST Input low level voltage
NRST Input high level voltage
NRST Schmitt trigger voltage
hysteresis
Weak pull-up equivalent resistor
NRST Input filtered pulse
NRST Input not filtered pulse
(see
EXT ERNAL
OUTPUT
ON 50pF
Maximum frequency is achieved if (t r + t f ) £ 2/3)T and if the duty cycle is (45-55%)
Table
(1)
0.1 µF
Parameter
33).
t r(I O)out
NRST
(2)
(~10% order)
10%
V DD
(2)
50%
when loaded by 50pF
R PU
(2)
90%
.
(1)
FILTER
DD
Conditions
V
supply voltage conditions summarized in
IN
T
10%
=
Table 36
V
SS
50%
90%
t r(I O)out
–0.5
Min
300
30
STM32F10xxx
are derived from tests
2
IL(NRST)
Internal Reset
Electrical characteristics
max level specified in
Typ
200
40
V
DD
ai14132b
Max
100
0.8
50
+0.5
ai14131
Unit
to
51/74
kΩ
ns
ns
V