STM32F101X6_08 STMICROELECTRONICS [STMicroelectronics], STM32F101X6_08 Datasheet

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STM32F101X6_08

Manufacturer Part Number
STM32F101X6_08
Description
Access line, advanced ARM-based 32-bit MCU with Flash memory, six 16-bit timers, ADC and seven communication interfaces
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Features
March 2008
Access line, advanced ARM-based 32-bit MCU with Flash memory,
Core: ARM 32-bit Cortex™-M3 CPU
– 36 MHz maximum frequency,
– Single-cycle multiplication and hardware
Memories
– 32 to 128 Kbytes of Flash memory
– 6 to 16 Kbytes of SRAM
Clock, reset and supply management
– 2.0 to 3.6 V application supply and I/Os
– POR, PDR and programmable voltage
– 4-to-16 MHz crystal oscillator
– Internal 8 MHz factory-trimmed RC
– Internal 40 kHz RC
– PLL for CPU clock
– 32 kHz oscillator for RTC with calibration
Low power
– Sleep, Stop and Standby modes
– V
Debug mode
– Serial wire debug (SWD) and JTAG
DMA
– 7-channel DMA controller
– Peripherals supported: timers, ADC, SPIs,
1 × 12-bit, 1 µs A/D converter (up to 16
channels)
– Conversion range: 0 to 3.6 V
– Temperature sensor
Up to 80 fast I/O ports
– 26/37/51/80 I/Os, all mappable on 16
1.25 DMIPS/MHz (Dhrystone 2.1)
performance at 0 wait state memory
access
division
detector (PVD)
interfaces
I
external interrupt vectors, all 5 V-tolerant
except for analog inputs
2
BAT
Cs and USARTs
supply for RTC and backup registers
six 16-bit timers, ADC and seven communication interfaces
STM32F101x8 STM32F101xB
Rev 6
Table 1.
VFQFPN36
6 × 6 mm
STM32F101xB
STM32F101x6
STM32F101x8
Up to 6 timers
– Up to three 16-bit timers, each with up to 4
– 2 watchdog timers (Independent and
– SysTick timer: 24-bit downcounter
Up to 7 communication interfaces
– Up to 2 x I
– Up to 3 USARTs (ISO 7816 interface, LIN,
– Up to 2 SPIs (18 Mbit/s)
ECOPACK
Reference
IC/OC/PWM or pulse counter
Window)
IrDA capability, modem control)
Device summary
7 x 7 mm
LQFP48
®
packages
2
C interfaces (SMBus/PMBus)
STM32F101C6, STM32F101R6,
STM32F101T6
STM32F101C8, STM32F101R8
STM32F101V8, STM32F101T8
STM32F101RB, STM32F101VB,
STM32F101CB
STM32F101x6
Root part number
10 x 10 mm
LQFP64
14 x 14 mm
LQFP100
www.st.com
1/74
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STM32F101X6_08 Summary of contents

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Access line, advanced ARM-based 32-bit MCU with Flash memory, six 16-bit timers, ADC and seven communication interfaces Features ■ Core: ARM 32-bit Cortex™-M3 CPU – 36 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access ...

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Contents Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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STM32F101xx 5.3.14 5.3.15 5.3.16 5.3.17 6 Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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List of tables List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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STM32F101xx Table 45. TS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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List of figures List of figures Figure 1. STM32F101xx access line block diagram Figure 2. Clock tree . . . . . . . . . . . . . . . . . . . . . . . ...

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STM32F101xx 1 Introduction This datasheet contains the description of the STM32F101xx access line family features, pinout, electrical characteristics, mechanical data and ordering information. For information on programming, erasing and protection of the internal Flash memory please refer to the STM32F10xxx ...

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Description 2.1 Device overview Table 2. Device features and peripheral counts (STM32F101xx access line) Peripheral Flash - Kbytes SRAM - Kbytes General purpose SPI USART 12-bit synchronized ADC number of channels GPIOs CPU frequency Operating voltage Operating ...

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STM32F101xx 2.2 Overview ® TM ARM Cortex The ARM Cortex™-M3 processor is the latest generation of ARM processors for embedded systems. It has been developed to provide a low-cost platform that meets the needs of MCU implementation, with a reduced ...

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Description Clocks and startup System clock selection is performed on startup, however the internal RC 8 MHz oscillator is selected as default CPU clock on reset. An external 4-16 MHz clock can be selected and is monitored for failure. During ...

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STM32F101xx Voltage regulator The regulator has three operation modes: main (MR), low power (LPR) and power down. ● used in the nominal regulation mode (Run) ● LPR is used in the Stop mode ● Power down is used ...

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Description RTC (real-time clock) and backup registers The RTC and the backup registers are supplied through a switch that takes power either on V supply when present or through the DD can be used to store data when V The ...

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STM32F101xx ² bus Up to two I²C bus interfaces can operate in multi-master and slave modes. They can support standard and fast modes. They support dual slave addressing (7-bit only) and both 7/10-bit addressing in master mode. A ...

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Description Serial wire JTAG debug port (SWJ-DP) The ARM SWJ-DP Interface is embedded. and is a combined JTAG and serial wire debug port that enables either a serial wire debug or a JTAG probe to be connected to the target. ...

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STM32F101xx Figure 2. Clock tree OSC_OUT OSC_IN OSC32_IN OSC32_OUT MCO 1. When the HSI is used as a PLL clock input, the maximum system clock frequency that can be achieved is 36 MHz have an ADC conversion time ...

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Pin descriptions 3 Pin descriptions Figure 3. STM32F101xx access line LQFP100 pinout VBAT PC13-TAMPER-RTC PC14-OSC32_IN PC15-OSC32_OUT VSS_5 VDD_5 OSC_IN OSC_OUT NRST VSSA VREF- VREF+ VDDA PA0-WKUP 16/74 PE2 1 PE3 2 PE4 3 PE5 4 PE6 ...

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STM32F101xx Figure 4. STM32F101xx access line LQFP64 pinout PC13-TAMPER-RTC PC15-OSC32_OUT Figure 5. STM32F101xx access line LQFP48 pinout PC13-TAMPER-RTC PC15-OSC32_OUT VBAT 1 2 PC14-OSC32_IN 3 ...

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Pin descriptions Figure 6. STM32F101xx access line VFQPFN36 pinout OSC_IN/PD0 OSC_OUT/PD1 PA0-WKUP 18/ DD_3 2 3 NRST 4 QFN36 V 5 SSA V 6 DDA 7 PA1 8 PA2 ...

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STM32F101xx Table 3. Pin definitions Pins Pin name - - 1 - PE2 - - 2 - PE3 - - 3 - PE4 - - 4 - PE5 - - 5 - PE6 BAT PC13-TAMPER- ...

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Pin descriptions Table 3. Pin definitions (continued) Pins Pin name - DD_4 PA4 PA5 PA6 PA7 - 24 33 PC4 ...

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STM32F101xx Table 3. Pin definitions (continued) Pins Pin name PB15 - - 55 - PD8 - - 56 - PD9 - - 57 - PD10 - - 58 - PD11 - - 59 - PD12 - ...

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Pin descriptions Table 3. Pin definitions (continued) Pins Pin name - - 85 - PD4 - - 86 - PD5 - - 87 - PD6 - - 88 - PD7 PB3/JTDO PB4/JNTRST ...

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STM32F101xx 4 Memory mapping The memory map is shown in Figure 7. Memory map 0xFFFF FFFF 7 0xE010 0000 Cortex-M3 internal 0xE000 0000 6 0xC000 0000 5 0xA000 0000 4 0x8000 0000 3 0x6000 0000 2 0x4000 0000 1 0x2000 ...

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Electrical characteristics 5 Electrical characteristics 5.1 Test conditions Unless otherwise specified, all voltages are referred to V 5.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply ...

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STM32F101xx Figure 8. Pin loading conditions C=50pF 5.1.6 Power supply scheme Figure 10. Power supply scheme 1.8-3.6V 5 × 100 × 10 µ µ µF Figure 9. ...

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Electrical characteristics 5.1.7 Current consumption measurement Figure 11. Current consumption measurement scheme 26/ BAT V BAT DDA ai14126 STM32F101xx ...

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STM32F101xx 5.2 Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 5: Current characteristics, and damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure ...

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Electrical characteristics Table 6. Thermal characteristics Symbol T STG T J 5.3 Operating conditions 5.3.1 General operating conditions Table 7. General operating conditions Symbol f Internal AHB clock frequency HCLK f Internal APB1 clock frequency PCLK1 f Internal APB2 clock ...

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STM32F101xx 5.3.3 Embedded reset and power control block characteristics The parameters given in temperature and V . Table 9. Embedded reset and power control block characteristics Symbol Programmable voltage V PVD detector level selection (2) V PVD hysteresis PVDhyst Power ...

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Electrical characteristics 5.3.4 Embedded reference voltage The parameters given in temperature and V Table 10. Embedded internal reference voltage Symbol V Internal reference voltage REFINT ADC sampling time when reading (1) T S_vrefint the internal reference voltage 1. Shortest sampling ...

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STM32F101xx Table 12. Maximum current consumption in Run mode, code with data processing running from RAM Symbol Parameter Supply current Run mode 1. External clock is 8 MHz and PLL is on when f 2. Based on ...

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Electrical characteristics Figure 13. Typical current consumption in Run mode versus frequency (at 3 code with data processing running from RAM, peripherals disabled Table 13. Maximum current consumption in ...

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STM32F101xx Table 14. Typical and maximum current consumptions in Stop and Standby modes Symbol Parameter Regulator in Run mode, Low-speed and high-speed internal RC oscillators and high-speed oscillator OFF (no independent watchdog) Supply current in Stop mode Regulator in Low ...

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Electrical characteristics Figure 15. Current consumption in Stop mode with regulator in Low-power mode versus temperature at V 140 120 100 -40 Figure 16. Current consumption in Standby mode versus temperature 2.5 ...

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STM32F101xx Typical current consumption The MCU is placed under the following conditions: ● All I/O pins are in input mode with a static value at V ● All peripherals are disabled except explicitly mentioned ● The Flash ...

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Electrical characteristics Table 16. Typical current consumption in Sleep mode, code with data processing code running from Flash or RAM Symbol Parameter Supply I current in DD Sleep mode 1. Typical values are measures Add an additional ...

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STM32F101xx Table 17. Typical current consumption in Standby mode Symbol Parameter Supply current Standby mode Backup domain I DD_VBAT supply current 1. Typical values are measures obtain Standby consumption with RTC ON, add ...

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Electrical characteristics On-chip peripheral current consumption The current consumption of the on-chip peripherals is given in under the following conditions: ● all I/O pins are in input mode with a static value at V ● all peripherals are disabled unless ...

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STM32F101xx 5.3.6 External clock source characteristics High-speed user external clock The characteristics given in external clock source, and under ambient temperature and supply voltage conditions summarized in Table Table 19. High-speed user external (HSE) clock characteristics Symbol User external clock ...

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Electrical characteristics Low-speed user external clock The characteristics given in external clock source, and under ambient temperature and supply voltage conditions summarized in Table Table 20. Low-speed user external clock characteristics Symbol User external clock source f LSE_ext frequency OSC32_IN ...

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STM32F101xx Figure 18. Low-speed external clock source AC timing diagram V LSEH 90% 10% V LSEL t r(LSE) EXTER NAL CLOCK SOURC E High-speed external clock The high-speed external (HSE) clock can be supplied with MHz ...

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Electrical characteristics Figure 19. Typical application with an 8 MHz crystal RESONATOR WITH IN TEGRATED CAPAC ITORS value depends on the crystal characteristics. Typical value is in the range EXT ...

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STM32F101xx 5.3.7 Internal clock source characteristics The parameters given in temperature and V High-speed internal (HSI) RC oscillator Table 23. HSI oscillator characteristics Symbol f Frequency HSI ACC Accuracy of HSI oscillator HSI t HSI oscillator startup time su(HSI) I ...

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Electrical characteristics Wakeup time from low power mode The wakeup times given in oscillator. The clock source used to wake up the device depends from the current operating mode: ● Stop or Standby mode: the clock source is the RC ...

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STM32F101xx 5.3.9 Memory characteristics Flash memory The characteristics are given at T Table 27. Flash memory characteristics Symbol t 16-bit programming time prog t Page (1kB) erase time ERASE t Mass erase time ME I Supply current DD V Programming ...

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Electrical characteristics 5.3.10 EMC characteristics Susceptibility tests are performed on a sample basis during device characterization. Functional EMS (Electromagnetic susceptibility) While a simple application is executed on the device (toggling 2 LEDs through I/O ports). the device is stressed by ...

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STM32F101xx Electromagnetic Interference (EMI) The electromagnetic field emitted by the device is monitored while a simple application is executed (toggling 2 LEDs through the I/O ports). This emission test is compliant with SAE J 1752/3 standard which specifies the test ...

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Electrical characteristics Table 32. Electrical sensitivities Symbol LU Static latch-up class 5.3.12 I/O port characteristics General input/output characteristics Unless otherwise specified, the parameters given in performed under the conditions summarized in compliant. Table 33. I/O static characteristics Symbol V Input ...

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STM32F101xx Output driving current The GPIOs (general purpose input/outputs) can sink or source up to +/-8 mA, and sink +20 mA (with a relaxed V In the user application, the number of I/O pins which can drive current must be ...

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Electrical characteristics Input/output AC characteristics The definition and values of input/output AC characteristics are given in Table 35, respectively. Unless otherwise specified, the parameters given in performed under ambient temperature and V Table 7. Table 35. I/O AC characteristics MODEx ...

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STM32F101xx Figure 21. I/O AC characteristics definition EXT ERNAL OUTPUT ON 50pF Maximum frequency is achieved £ 2/3)T and if the duty cycle is (45-55%) 5.3.13 NRST pin characteristics The NRST pin input ...

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Electrical characteristics 5.3.14 TIM timer characteristics The parameters given in Refer to Section 5.3.12: I/O port characteristics function characteristics (output compare, input capture, external clock, PWM output). Table 37. TIMx Symbol t Timer resolution time res(TIM) Timer external clock f ...

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STM32F101xx 2 Table 38 characteristics Symbol t SCL clock low time w(SCLL) t SCL clock high time w(SCLH) t SDA setup time su(SDA) t SDA data hold time h(SDA) t r(SDA) SDA and SCL rise time t r(SCL) ...

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Electrical characteristics 2 Figure 23 bus AC waveforms and measurement circuit I²C bus S TART SDA t f(SDA) t h(STA) SCL t w(SCKH) 1. Measurement points are done at CMOS levels: 0.3V Table 39. SCL frequency (f 1. ...

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STM32F101xx SPI interface characteristics Unless otherwise specified, the parameters given in performed under ambient temperature, f summarized in Table Refer to Section 5.3.12: I/O port characteristics function characteristics (NSS, SCK, MOSI, MISO). Table 40. SPI characteristics Symbol f SCK SPI ...

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Electrical characteristics Figure 24. SPI timing diagram - slave mode and CPHA=0 NSS input t SU(NSS) CPHA= 0 CPOL=0 t w(SCKH) CPHA w(SCKL) CPOL=1 t a(SO) MISO OUT su(SI) MOSI I NPUT Figure 25. SPI ...

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STM32F101xx Figure 26. SPI timing diagram - master mode High NSS input CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=0 CPHA=1 CPOL=1 t su(MI) MISO INP UT MOSI OUTUT 1. Measurement points are done at CMOS levels: 0.3V (1) t ...

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Electrical characteristics 5.3.16 12-bit ADC characteristics Unless otherwise specified, the parameters given in performed under ambient temperature, f conditions summarized in Note recommended to perform a calibration after each power-up. Table 41. ADC characteristics Symbol Parameter V ADC ...

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STM32F101xx Equation 1: R AIN < R --------------------------------------------------------------- - R AIN × ADC The formula above error below 1/4 of LSB. Here (from 12-bit resolution). Table 42. R AIN T (cycles) s 1.5 7.5 13.5 ...

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Electrical characteristics Table 44. ADC accuracy Symbol ET Total unadjusted error EO Offset error EG Gain error ED Differential linearity error EL Integral linearity error 1. ADC DC accuracy values are measured after internal calibration. 2. Better performance could be ...

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STM32F101xx Figure 28. Typical connection diagram using the ADC R AIN (1) V AIN 1. Refer to Table must be added to C PARASITIC PCB layout quality) plus the pad capacitance (3 pF). A high C accuracy. ...

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Electrical characteristics Figure 30. Power supply and reference decoupling ( and V REF+ REF- 5.3.17 Temperature sensor characteristics Table 45. TS characteristics Symbol ( SENSE L (1) Avg_Slope Average slope (1) Voltage at 25° ...

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STM32F101xx 6 Package characteristics 6.1 Package mechanical data In order to meet environmental requirements, ST offers the STM32F101xx in ECOPACK packages. These packages have a Lead-free second-level interconnect. The category of second-level interconnect is marked on the package and on ...

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Package characteristics Figure 31. VFQFPN36 mm, 0.5 mm pitch, package outline Seating plane Drawing is not to scale. 2. The back-side pad is ...

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STM32F101xx Figure 33. LQFP100, 100-pin low-profile quad flat package outline 100 26 Pin identification e 1. Drawing is not to scale. 2. Dimensions are in millimeters. Table 47. LQPF100 – ...

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Package characteristics Figure 35. LQFP64 – 64 pin low-profile quad flat package outline Drawing is not to scale. 2. Dimensions are in millimeters. Table 48. LQFP64 – 64-pin low-profile quad flat package mechanical data Dim. Min A ...

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STM32F101xx Figure 37. LQFP48 – 48-pin low-profile quad flat package outline D D1 ai14384 1. Drawing is not to scale. 2. Dimensions are in millimeters. Table 49. LQFP48 – 48-pin low-profile quad flat package mechanical data Dim. Min A A1 ...

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Package characteristics 6.2 Thermal characteristics The maximum chip junction temperature (T Table 7: General operating conditions on page The maximum chip-junction temperature, T using the following equation: Where: max is the maximum ambient temperature in ° C, ● ...

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STM32F101xx 7 Ordering information scheme Table 51. Ordering information scheme Example: Device family STM32 = ARM-based 32-bit microcontroller Product type F = general-purpose Device subfamily 101 = access line Pin count pins pins R ...

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Revision history 8 Revision history Table 52. Document revision history Date Revision 06-Jun-2007 20-Jul-07 70/74 1 First draft. I values modified in Table 11: Maximum current consumption in Run DD and Sleep modes ( range modified in ...

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STM32F101xx Table 52. Document revision history (continued) Date Revision 18-Oct-2007 V value added to ESD(CDM) Note added below Table 9: Embedded reset and power control block characteristics. and below characteristics. Note added below Table 34: Output voltage characteristics parameter description ...

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Revision history Table 52. Document revision history (continued) Date Revision 22-Nov-2007 72/74 Document status promoted from preliminary data to datasheet. Small text changes. STM32F101CB part number corrected in Number of communication peripherals corrected for STM32F101Tx in Table 2: Device features ...

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STM32F101xx Table 52. Document revision history (continued) Date Revision 14-Mar-2008 21-Mar-2008 Figure 2: Clock tree on page 15 CRC added (see CRC (cyclic redundancy check) calculation unit on page 9 and Figure 7: Memory map on page 23 Maximum T ...

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Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any ...

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