STR910FAZ32H6T STMICROELECTRONICS [STMicroelectronics], STR910FAZ32H6T Datasheet - Page 45

• Manufacturer Part Number: STR910FAZ32H6T
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STR91xFAx32 STR91xFAx42 STR91xFAx44
5.2
5.2.1
Note:
Table 9.
-
-
-
-
Pkg
67
69
71
76
2
3
4
5
6
7
8
9
1
K10
H12
L11
J11
Default pin functions
During and just after reset, all pins on ports 0-9 default to high-impedance input mode until
CPU firmware assigns other functions to the pins. This initial input mode routes all pins on
ports 0-9 to be read as GPIO inputs as shown in the “Default Pin Function” column of
Table
shown in the “Default Input Function” column of
remain until CPU firmware makes other assignments. At any time, even after the CPU
assigns pins to alternate functions, the CPU may always read the state of any pin on ports
0-9 as a GPIO input. CPU firmware may assign alternate functions to port pins as shown in
columns “Alternate Input 1” or “Alternate Output 1, 2, 3” of
registers at run-time.
General notes on pin usage
STMicroelectronics advises to ground, or pull up to V
pins on port 0 - 9 to reduce noise susceptibility, noise generation, and minimize power
consumption. There are no internal or programmable pull-up resistors on ports 0-9.
All pins on ports 0 - 9 are 5V tolerant
Pins on ports 0,1,2,4,5,7,8,9 have 4 mA drive and 4mA sink. Ports 3 and 6 have 8 mA drive
and 8 mA sink.
For 8-bit non-muxed EMI operation: Port 8 is eight bits of data, ports 7 and 9 are 16 bits of
address.
For 16-bit muxed EMI operation: Ports 8 and 9 are 16 bits of muxed address and data bits,
port 7 is up to eight additional bits of high-order address
Signal polarity is programmable for interrupt request inputs, EMI_ALE, timer input capture
inputs and output compare/PWM outputs, motor control tach and emergency stop inputs,
and motor control phase outputs.
HiZ = High Impedance, V = Voltage Source, G = Ground, I/O = Input/Output
STR910FA devices do not support USB. On these devices USBDP and USBDN signals are
"Not Used" (USBDN is not connected, USBDP must be pulled up by a 1.5K ohm resistor to
VDDQ), and all functions named “USB" are not available.
STR910FA 128-pin and 144-ball devices do not support Ethernet. On these devices
PHYCLK and all functions named “MII*" are not available.
Device pin description
Name
P0.0
P0.1
P0.2
P0.3
Pin
9. Simultaneously, certain port pin signals are also routed to other functional inputs as
I/O
I/O
I/O
I/O
Default Pin
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
Function
GPIO_0.0,
GPIO_0.1,
GPIO_0.2,
GPIO_0.3,
PHY Xmit clock
PHY Rx data0
MII_TX_CLK,
PHY Rx data
Function
MII_RXD0,
MII_RXD1,
Default
Input
-
I2C0_CLKIN,
I2C1_CLKIN,
Alternate
I2C clock in
I2C clock in
I2C data in
I2C data in
I2C0_DIN,
I2C1_DIN,
Input 1
Table
DDQ
Alternate
Output 1
GPIO_0.0,
GP Output
GPIO_0.1,
GP Output
GPIO_0.2,
GP Output
GPIO_0.3,
GP Output
9, and these pin input functions will
Alternate functions
using a 100 K Ω resistor, all unused
Table 9
I2C0_CLKOUT,
I2C1_CLKOUT,
by writing to control
I2C clock out
I2C clock out
I2C0_DOUT,
I2C1_DOUT,
Alternate
I2C data out
I2C data out
Output 2
Pin description
Alternate
ETM_PCK0,
ETM_PCK1,
ETM_PCK2,
ETM_PCK3,
ETM Packet
ETM Packet
ETM Packet
ETM Packet
Output 3
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