LPC2888FET180/01 NXP [NXP Semiconductors], LPC2888FET180/01 Datasheet
LPC2888FET180/01
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LPC2888FET180/01 Summary of contents
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LPC2880; LPC2888 16/32-bit ARM microcontrollers cache flash, Hi-Speed USB 2.0 device, and SDRAM memory interface Rev. 03 — 17 April 2008 1. General description The LPC2880/2888 is an ARM7-based microcontroller for portable applications requiring ...
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... Ordering options Table 2. Ordering options Type number Flash memory LPC2880FET180 - LPC2888FET180/ LPC2888FET180/ [1] JTAG interface disabled to provide code read protection. These devices are meant for volume production (no JTAG debugging is possible). The on-chip flash on these devices can only be programmed via USB. ...
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NXP Semiconductors 4. Block diagram LPC2880/2888 1 MB (1) FLASH SRAM FLASH SRAM INTERFACE INTERFACE +1 DC-TO-DC 3.3 V, CONVERTER 1.8 V START, STOP WATCHDOG SYSTEM CONTROL EVENT ROUTER CLOCK XTALI OSCILLATOR GENERATION AND PLLs XTALO ...
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... Row D 1 LD4/P4[8] LPC2880_LPC2888_3 Preliminary data sheet 16/32-bit ARM microcontrollers with external memory interface ball A1 index area LPC2880FET180 H J LPC2888FET180/01 K LPC2888FET180/ Transparent top view Pin allocation table Pin Symbol 2 D1/P0[ SS2(EMC) 10 MCLKO/P1[14] 14 ...
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NXP Semiconductors Table 3. Pin Symbol A4/P0[20] Row A1/P0[17] Row DATO/P3[6] Row WSI/P3[2] Row ...
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NXP Semiconductors Table 3. Pin Symbol 17 DCDC_LX1 Row Row T 1 AINR 5 JTAG_TDI JTAG_TRST 17 DM Row U 1 VREF(DADC) 5 AIN4 JTAG_TDO 17 DP ...
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NXP Semiconductors Table 4. Pin description …continued Symbol Ball # Type Analog in (single converter) AIN0 U7 I AIN1 T7 I AIN2 U6 I AIN3 T6 I AIN4 V10 P DD(ADC3V3) V U10 P SS(ADC) Analog out ...
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NXP Semiconductors Table 4. Pin description …continued Symbol Ball # Type External memory interface D0/P0[ D1/P0[1] A2 D2/P0[2] B2 D3/P0[3] A3 D4/P0[4] A4 D5/P0[5] B4 D6/P0[6] A5 D7/P0[7] B5 D8/P0[ D9/P0[9] C5 D10/P0[10] C6 D11/P0[11] B6 ...
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NXP Semiconductors Table 4. Pin description …continued Symbol Ball # Type CKE/P1[9] B10 FO DQM0/P1[10] C12 FO DQM1/P1[11] A11 FO DYCS/P1[ MCLKO/P1[14] A10 FO OE/P1[18] A17 FO RAS/P1[17 RPO/P1[19 STCS0/P1[ STCS1/P1[6] A8 ...
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NXP Semiconductors Table 4. Pin description …continued Symbol Ball # Type Memory card interface MCMD/P5[ MD0/P5[ MD1/P5[ MD2/P5[ MD3/P5[ MCLK/P5[ Oscillator (32.768 kHz) X32I V7 I X32O T8 ...
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NXP Semiconductors Table 4. Pin description …continued Symbol Ball # Type Digital power and ground DD1(CORE1V8) V V15 P DD1(FLASH1V8) V A16 P DD1(EMC DD1(IO3V3) V V11 P DD2(CORE1V8 DD2(EMC) V ...
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NXP Semiconductors Lower speed peripheral functions are connected to the APBs. The four AHB-to-APB bridges interface the APBs to the AHB. 6.1.1 ARM7TDMI processor The ARM7TDMI is a general purpose 32-bit microprocessor that offers high performance and very low power ...
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NXP Semiconductors The boot code in this ROM reads the state of the mode inputs and accordingly does one of the following: • Starts execution in internal flash • Starts execution in external memory • Performs a hardware self-test, or ...
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NXP Semiconductors 4.0 GB reserved peripherals includes AHB and 4 APB buses 2.0 GB reserved dynamic memory bank reserved static memory bank external memory (second instance) reserved static memory bank reserved ...
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NXP Semiconductors 6.3 Cache The CPU of the LPC2880/2888 has been extended with a 2-way set-associative cache. The cache size and can store both data and instruction code. If code that is being executed is present ...
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NXP Semiconductors Programming the flash in a running application is accomplished via a register interface on the APB bus. The flash module can generate an interrupt request when burning or erasing is completed. The flash memory contains a buffer to ...
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NXP Semiconductors – address range with three chip selects. • One chip select for synchronous memory and three chip selects for static memory devices. • Power-saving modes dynamically control CKE and CLKOUT to SDRAMs. • Dynamic memory self-refresh ...
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NXP Semiconductors 6.9 Event router 88 external and 11 internal LPC2880/2888 signals are connected to the Event Router block. GPIO input pins, functional input pins, and even functional outputs can be monitored by the Event Router. Each signal can act ...
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NXP Semiconductors The WDT clock increments a 32-bit Prescale Counter, the value of which is continually compared to the value of the Prescale Register. When the Prescale Counter matches the Prescale Register at a WDT clock edge, the Prescale Counter ...
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NXP Semiconductors • The GPDMA supports a subset of the flow control signals supported by ARM DMA channels, specifically ‘single’ but not ‘burst’ operation. • Memory-to-memory, memory-to-peripheral, peripheral-to-memory, and peripheral-to-peripheral transfers. • Scatter or gather DMA is supported through the ...
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NXP Semiconductors • Serial clock synchronization allows devices with different bit rates to communicate via one serial bus. • Serial clock synchronization can be used as a handshake mechanism to suspend and resume serial transfer. • Supports normal (100 kHz) ...
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NXP Semiconductors The LPC2880/2888 USB controller enables 480 Mbit Mbit/s data exchange with a USB host controller. It includes a USB controller, a DMA engine, and a USB 2.0 ATX physical interface. The USB controller consists of the ...
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NXP Semiconductors 6.20 LCD interface The LCD interface contains logic to interface to a 6800 or 8080 bus compatible LCD controller. The LCD interface is compatible with the 6800 bus standard and the 8080 bus standard, with one address pin ...
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NXP Semiconductors The on-chip watchdog timer can cause a chip reset if not updated within a programmable time interval. A status register allows software to determine if a reset was caused by the watchdog timer. The watchdog timer can also ...
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NXP Semiconductors 6.21.6 APBs Most peripheral functions are accessed by on-chip APBs that are attached to the higher speed AHB. The APBs perform reads and writes to peripheral registers in three peripheral clocks. 6.22 Emulation and debugging The LPC2880/2888 supports ...
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NXP Semiconductors 7. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (1.8 V) DD(1V8) V supply voltage (3.3 V) DD(3V3) V external memory controller DD(EMC) supply voltage ...
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NXP Semiconductors 8. Static characteristics Table 6. Static characteristics +85 C, unless otherwise specified. amb Symbol Parameter V supply voltage (1.8 V) DD(1V8) V supply voltage (3.3 V) DD(3V3) V analog supply voltage (3.3 V) ...
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NXP Semiconductors Table 6. Static characteristics +85 C, unless otherwise specified. amb Symbol Parameter Oscillator pins V crystal input voltage i(xtal) V crystal output voltage o(xtal) DC-to-DC converter V battery supply voltage BAT V DC-to-DC ...
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NXP Semiconductors Table 6. Static characteristics +85 C, unless otherwise specified. amb Symbol Parameter Power consumption (battery supplies voltage) I battery supply current BAT Power consumption (DC-to-DC converter supplies voltage) I supply current DD I ...
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NXP Semiconductors Table 6. Static characteristics +85 C, unless otherwise specified. amb Symbol Parameter I supply current DD I supply current DD I supply current DD [1] Typical ratings are not guaranteed. The values listed ...
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NXP Semiconductors 9. Dynamic characteristics Table 7. Dynamic characteristics +85 C, unless otherwise specified. amb Symbol Parameter External clock f external clock frequency ext Port pins t rise time r t fall time f [1] ...
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NXP Semiconductors Table 8. Dynamic characteristics: static external memory interface pF amb DD1(EMC) Symbol Parameter Common to read and write cycles t CS LOW to address valid CSLAV time Read cycle ...
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NXP Semiconductors Table 9. Dynamic characteristics: dynamic external memory interface pF amb DD1(EMC) Symbol Parameter [1] Read cycle parameters t clock HIGH time CHCX t clock LOW time CLCX T clock ...
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NXP Semiconductors Table 10. Dynamic characteristics: dynamic external memory interface pF amb DD1(EMC) Symbol Parameter [1] Read cycle parameters t clock HIGH time CHCX t clock LOW time CLCX T clock ...
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NXP Semiconductors 9.1 Timing STCS t CSLAV A t OELAV OE t CSLOEL t BLSLAV BLS t CSLBLSL D Fig 4. External memory read access to static memory LPC2880_LPC2888_3 Preliminary data sheet LPC2880; LPC2888 16/32-bit ARM microcontrollers with external memory ...
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NXP Semiconductors STCS t CSLAV A t CSLDV D t CSLWEL WE t WELDV t CSLBLSL BLS Fig 5. External memory write access to static memory LPC2880_LPC2888_3 Preliminary data sheet LPC2880; LPC2888 16/32-bit ARM microcontrollers with external memory interface t ...
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NXP Semiconductors CLK DYCS RAS CAS, DQM A D Fig 6. External memory read access to dynamic memory LPC2880_LPC2888_3 Preliminary data sheet 16/32-bit ARM microcontrollers with external memory interface t h(S) t su(S) t h(RAS) t su(RAS h(CAS), ...
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NXP Semiconductors CLK DYCS RAS WE CAS, DQM A D Fig 7. External memory write access to dynamic memory LPC2880_LPC2888_3 Preliminary data sheet 16/32-bit ARM microcontrollers with external memory interface t h(S) t su(S) t h(RAS) t su(RAS) t h(W) ...
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NXP Semiconductors 10. Package outline TFBGA180: plastic thin fine-pitch ball grid array package; 180 balls; body 0.8 mm ball A1 index area ...
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NXP Semiconductors 11. Abbreviations Table 11. Acronym ADC AMBA AHB APB CISC CGU DAC DMA DAI DAO FIQ GPIO IrDA IRQ JTAG LCD MCI PLL RISC SD SD/MMC SDRAM SOF SRAM UART USB WDT LPC2880_LPC2888_3 Preliminary data sheet 16/32-bit ARM ...
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NXP Semiconductors 12. Revision history Table 12. Revision history Document ID Release date LPC2880_LPC2888_3 20080417 • Modifications: Table 1 “Ordering • Table 2 “Ordering /01 and /D1 devices. • Table • Table • Table • Figure • Figure LPC2880_LPC2888_2 20061121 ...
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NXP Semiconductors 13. Legal information 13.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...
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NXP Semiconductors 15. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...