LPC2292FBD144/00 PHILIPS [NXP Semiconductors], LPC2292FBD144/00 Datasheet - Page 19

• Manufacturer Part Number: LPC2292FBD144/00
• Description: 16/32-bit ARM microcontrollers; 256 kB ISP/IAP flash with CAN, 10-bit ADC and external memory interface
• Manufacturer: PHILIPS [NXP Semiconductors]

NXP Semiconductors
LPC2292_2294_6
Product data sheet
6.8.1 Features
6.8.2 Features added with the Fast GPIO set of registers available on
6.9.1 Features
6.9.2 ADC features available in LPC2292/2294/01 only
6.8 General purpose parallel I/O (GPIO) and Fast I/O
6.9 10-bit ADC
Device pins that are not connected to a specific peripheral function are controlled by the
parallel I/O registers. Pins may be dynamically configured as inputs or outputs. Separate
registers allow setting or clearing any number of outputs simultaneously. The value of the
output register may be read back, as well as the current state of the port pins.
LPC2292/2294/01 only
The LPC2292/2294 each contain a single 10-bit successive approximation ADC with four
multiplexed channels.
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Bit-level set and clear registers allow a single instruction set or clear of any number of
bits in one port.
Direction control of individual bits.
Separate control of output set and clear.
All I/O default to inputs after reset.
Fast GPIO registers are relocated to the ARM local bus for the fastest possible I/O
timing, enabling port pin toggling up to 3.5 times faster than earlier LPC2000 devices.
Mask registers allow treating sets of port bits as a group, leaving other bits
unchanged.
All Fast GPIO registers are byte addressable.
Entire port value can be written in one instruction.
Ports are accessible via either the legacy group of registers (GPIOs) or the group of
registers providing accelerated port access (Fast GPIOs).
Measurement range of 0 V to 3 V.
Capable of performing more than 400000 10-bit samples per second.
Burst conversion mode for single or multiple inputs.
Optional conversion on transition on input pin or Timer Match signal.
Every analog input has a dedicated result register to reduce interrupt overhead.
Every analog input can generate an interrupt once the conversion is completed.
The ADC pads are 5 V tolerant when configured for digital I/O function(s).
Rev. 06 — 10 December 2007
16/32-bit ARM microcontrollers with external memory interface
LPC2292/LPC2294
© NXP B.V. 2007. All rights reserved.
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