AT32UC3B0512-A2UES ATMEL [ATMEL Corporation], AT32UC3B0512-A2UES Datasheet - Page 84

• Manufacturer Part Number: AT32UC3B0512-A2UES
• Description: 32-bit AVR Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

12.2.3.12
12.2.3.13
12.2.3.14
RTC
OCD
Processor and Architecture
3. PAGEN Semantic Field for Program GP Fuse Byte is WriteData[7:0], ByteAddress[1:0]
1. Writes to control (CTRL), top (TOP) and value (VAL) in the RTC are discarded if the
2. The RTC CLKEN bit (bit number 16) of CTRL register is not available
1. Stalled memory access instruction writeback fails if followed by a HW breakpoint
1. Local Busto fast GPIO not available on silicon Rev B
2. Memory Protection Unit (MPU) is non functional
3. Bus error should be masked in Debug mode
on revision B instead of WriteData[7:0], ByteAddress[2:0]
PAGEN Semantic Field for Program GP Fuse Byte is WriteData[7:0], ByteAddress[1:0] on
revision B instead of WriteData[7:0], ByteAddress[2:0].
Fix/Workaround
None.
RTC peripheral bus clock (PBA) is divided by a factor of four or more relative to the
HSB clock
Writes to control (CTRL), top (TOP) and value (VAL) in the RTC are discarded if the RTC
peripheral bus clock (PBA) is divided by a factor of four or more relative to the HSB clock.
Fix/Workaround
Do not write to the RTC registers using the peripheral bus clock (PBA) divided by a factor of
four or more relative to the HSB clock.
The RTC CLKEN bit (bit number 16) of CTRL register is not available.
Fix/Workaround
Do not use the CLKEN bit of the RTC on Rev B.
Consider the following assembly code sequence:
A
B
If a hardware breakpoint is placed on instruction B, and instruction A is a memory access
instruction, register file updates from instruction A can be discarded.
Fix/Workaround
Do not place hardware breakpoints, use software breakpoints instead. Alternatively, place a
hardware breakpoint on the instruction before the memory access instruction and then sin-
gle step over the memory access instruction.
Local bus is only available for silicon RevE and later.
Fix/Workaround
Memory Protection Unit (MPU) is non functional.
Fix/Workaround
Do not use the MPU.
If a bus error occurs during debug mode, the processor will not respond to debug com-
mands through the DINST register.
Fix/Workaround
A reset of the device will make the CPU respond to debug commands again.
Do not use if silicon revison older than F.